Author Archives: Chris Edwards

About Chris Edwards

Chris Edwards has spent a long time covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology. His work has appeared in a variety of international newspapers including The Guardian, The Daily Telegraph, The Age and the South China Morning Post.
February 22, 2024

Cadence to work on IP for Intel 18A

Cadence has agreed to work with Intel Foundry Services on IP and flows for the 18A process, which will include backside power delivery and nanosheet transistors.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations: ,
February 8, 2024

Accellera forms working group for mixed-signal interfaces

Accellera has formed a working group to look at extensions to SystemVerilog to improve support for mixed-signal designs.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations:
February 1, 2024

Future Facilities core drives Cadence thermal suite

Cadence has introduced a platform for performing thermal and thermal-stress analysis of subsystems, from 2.5D and 3DICs to PCBs and complete electronic assemblies.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , ,   |  Organizations:
January 12, 2024

DVCon gears up for March in San Jose

Workshops on portable stimulus, functional safety, verification of RISC-V processors, and design with chiplets and large language models will feature at the upcoming 2024 DVCon US.
Article  |  Topics: Blog - EDA  |  Tags: , , ,
December 27, 2023

Flow stability and chip reliability top the papers at DVCon Europe

The two best papers at the recent DVCon Europe underlined two of the issues that now face chip-implementation teams: efficient flows and reliability.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations:
December 22, 2023

Sustainability work puts numbers on chipmaking production at IEDM

Shifting to low-carbon generation for electricity would do much to cut the carbon footprint of semiconductor processes according to work shown at this year’s IEDM.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations: , ,
December 18, 2023

FD-SOI processes lead to double-decker monolithic 3D

At IEDM, CEA-Leti described a process that avoids the thermal problems of implementing CMOS transistors in the metal stack using monolithic integration.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
December 6, 2023

Applied and CEA-Leti team up for novel materials R&D

Applied Materials and CEA-Leti have expanded their collaboration with the creation of a joint lab to develop materials useful for sensors, RF communications, and power devices, and with a focus on heterogeneous integration.
Article  |  Topics: Blog - IP  |  Tags: , , , , ,   |  Organizations: ,
November 22, 2023

Arm gives Helium to low-end Cortex-M core

Arm has added machine-learning extensions and pointer-security instructions to its latest Cortex-M series core.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , , ,   |  Organizations:
November 15, 2023

Siemens buys Insight for reliability addition to Calibre

Siemens has completed the acquisition of Insight EDA, a specialist in circuit-reliability analysis.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations: