Author Archives: Chris Edwards

About Chris Edwards

Chris Edwards has spent a long time covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology. His work has appeared in a variety of international newspapers including The Guardian, The Daily Telegraph, The Age and the South China Morning Post.
December 6, 2021

Imperas pulls together tools for RISC-V verification

Imperas has put together a suite of tools to verify that custom RISC-V processor cores remain compatible with the common infrastructure behind the open-source instruction set.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations:
November 8, 2021

Chiplets may have to prove themselves for secure operation

University of Florida researcher proposes third-party checks on chiplets to demonstrate they are free of trojans.
Article  |  Topics: Blog - EDA, IP, PCB  |  Tags: , , , ,   |  Organizations:
November 5, 2021

UK consortium starts work on cryogenic CMOS

A £6.5m grant will fund the development of memories and other IP to improve the control of qubits in quantum computers.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations: , ,
November 4, 2021

Design management survey points to more tactical cloud EDA

Cloud computing is gaining ground in EDA but close to a third of organizations are planning to stay with on-premises computing for the foreseeable future, according to a survey commissioned by IC Manage.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations:
November 3, 2021

Python provides the link for speed checks at Sondrel

Sondrel has combined EDA tools with custom SystemC and Python code to develop a system that can help automate the detailed performance analysis of high-level architectures before RTL is generated.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations: ,
November 2, 2021

Glitch detection cores add to Agile portfolio

Agile Analog has moved into the supply of cores for detecting hardware-hacking attempts as well as more conventional data-conversion modules.
Article  |  Topics: Blog - IP  |  Tags: , ,   |  Organizations:
October 28, 2021

Emulation’s scheduling challenge

Emulation capacity and its scalability is a major issue for large SoC designs, said panelists at DVCon Europe.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations: , , ,
October 27, 2021

DVCon Europe explores pitfalls and possibilities of AI for verification

In a panel at this week’s DVCon Europe, experts described a number of issues facing teams looking to incorporate machine learning in logic verification flows and why some of those efforts will not pay off while others succeed.
October 26, 2021

Arm SystemReady adjusts to compatibility issues

Arm’s SystemReady program has revealed a number of the subtleties involved when trying to maintain software compatibility with operating systems without moving to the straightjacket of platforms like those used for the x86-based PC.
Article  |  Topics: Blog - IP, PCB  |  Tags: , , , ,   |  Organizations:
October 26, 2021

Arm accelerates library verification with Solido ML

Arm has used machine-learning tools supplied by the Solido group at Siemens Digital Industries Software to speed up IP validation runtime a thousand-fold compared to conventional statistical methods.
Article  |  Topics: Blog - EDA, IP  |  Tags: , ,   |  Organizations: ,