Sustainability work puts numbers on chipmaking production at IEDM
Shifting to low-carbon generation for electricity would do much to cut the carbon footprint of semiconductor processes according to work shown at this year’s IEDM.
Author Archives: Chris Edwards
FD-SOI processes lead to double-decker monolithic 3D
At IEDM, CEA-Leti described a process that avoids the thermal problems of implementing CMOS transistors in the metal stack using monolithic integration.
Applied and CEA-Leti team up for novel materials R&D
Applied Materials and CEA-Leti have expanded their collaboration with the creation of a joint lab to develop materials useful for sensors, RF communications, and power devices, and with a focus on heterogeneous integration.
Arm gives Helium to low-end Cortex-M core
Arm has added machine-learning extensions and pointer-security instructions to its latest Cortex-M series core.
Siemens buys Insight for reliability addition to Calibre
Siemens has completed the acquisition of Insight EDA, a specialist in circuit-reliability analysis.
Imec makes virtual fab public for green analysis
Imec has a version of its imec.netzero virtual fab tool accessible to the general public with the aim of showing the environmental impact of IC manufacturing.
Cadence combines ML techniques for power signoff
Cadence has linked several machine-learning approaches to build a tool that is designed to speed up the detection and diagnosis of on-chip power-integrity issues.
Codasip pips Arm to commercial CHERI with RISC-V version
Codasip has put support for a set of instruction extensions intended to secure memory into its RISC-V core designs.
X-Fab adds galvanic isolation to CMOS process
X-Fab has made it possible to put galvanic isolation based on capacitive coupling directly into chips made on its XA035 process.
Companies partner for embeddable ReRAM
SureCore and Intrinsic have teamed up to provide a way to implement resistive random-access memory as an SoC-embeddable technology.