September 5, 2022
5G IC designs have needed aggressive innovation across many elements and more use of FD-SOI that both pose parasitic extraction challenges.
September 5, 2022
Learn how one of the leading tool vendors addresses the security of its products and customer data through a ground-up cybersecurity strategy.
August 31, 2022
Intel's Pathfinder for RISC-V is intended to boost the use of the architecture among a wider range of SoC design teams.
August 3, 2022
Imperas Software has published an open-source functional-coverage library for RISC-V cores.
August 3, 2022
Accellera is on the first stage of setting up a working group to create a standard for exchanging information on clock domain crossing checks.
July 18, 2022
As the project that funded OpenRoad draws to a close, experts pondered its wider future at the 59th DAC.
July 14, 2022
Three EDA vendors team up to create stronger verification flow for RISC-V processor implementations.
July 13, 2022
Siemens has launched Calibre DRC engines that make it easier to perform useful checks early in the layout process.
July 12, 2022
Cadence president expects expanded role for reinforcement learning in tool portfolio and looks for help on AI for verification.
July 12, 2022
Siemens EDA has launched a second version of its Symphony simulation environment designed to support quicker debug cycles.