Tech Design Forum Briefing


Briefing Authors

Paul Dempsey

Paul Dempsey Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.

Luke Collins

Luke Collins Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.

Chris Edwards

Chris Edwards Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
October 17, 2018

FPGA playing verification catch-up as bugs escape

The latest Mentor-commissioned Wilson Research Group study on ASIC and FPGA verification highlights technique adoption and maturity.

October 17, 2018

DVCon Europe takes in machine learning and stimulus for verification

Next week’s DVCon Europe conference in Munich will tackle a range of topics, from analog verification to the use of machine learning for functional verification, backed up with case studies on the use of TLM and SystemC in live projects.

October 17, 2018

UltraSoC combines tools for cross-SoC debug and analysis

Following deals with Imperas and Percepio, UltraSoC has released an IDE aimed at debug, run control, performance tuning and runtime analytics for SoC development.

October 9, 2018

Synopsys takes TSMC design into the cloud; IP to 7nm, 5nm and automotive processes

Synopsys is taking IC design on TSMC processes into the cloud with the launch of the Synopsys Cloud Solution, which will run on platforms from Synopsys, Amazon Web Services (AWS) or Microsoft Azure.

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October 2, 2018

White paper outlines challenges of developing machine-learning hardware

A recent white paper from Synopsys outlines the complexities of developing hardware for use in machine-learning and artificial-intelligence (AI) systems.

September 26, 2018

SureCore SRAM tuning service aims for lower power

SureCore is introducing an IP customization service intended to deliver SRAM cores tuned to specific power and performance requirements for wearable, wireless, augmented reality, and IoT devices.

September 26, 2018

DVCon Europe keynotes take in digital twin and IoT concepts

Two keynote speakers have been announced for DVCon Europe 2018, which takes place next month.

September 24, 2018

Module strategies try to streamline IoT trials

Suppliers to the embedded industry see modules and readymade software as being key to getting IoT projects off the ground.

September 21, 2018

Power analyzer takes rates up to 5MHz

Yokogawa has moved to a modular architecture to handle the growing number of complex applications that are emerging in power testing.

September 19, 2018

Dialog plans configurable mixed-signal expansion

Dialog Semiconductor aims to expand its use of configurable mixed-signal circuitry across its product line following its acquisition of specialist Silego a year ago.

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