Tech Design Forum Briefing


Briefing Authors

Paul Dempsey

Paul Dempsey Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.

Luke Collins

Luke Collins Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.

Chris Edwards

Chris Edwards Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
December 12, 2018

IEDM shows progress on embedded eMRAM

Embedded magnetic RAM is emerging as a contender for on-chip memory not just from a density standpoint but from that of power.

December 6, 2018

Microchip opts for RISC-V cores in SoC FPGA

Microsemi has put multiple RISC-V cores into a new generation of SoC FPGAs, intended for embedded systems that need to run Linux.

December 5, 2018

Leti takes the heat off monolithic 3D

CEA-Leti claimed at IEDM to have achieved major steps in bringing monolithic 3D integration closer to production readiness.

December 4, 2018

Achronix builds machine learning IP into eFPGA

Achronix has incorporated direct support for machine learning into the latest version of its eFPGA architecture.

November 30, 2018

Design Compiler updated for 5nm and beyond

Workhorse synthesis tool updated to make it suitable for use on designs at process nodes of 5nm and below.

November 27, 2018

Synopsys fuses synthesis and place-and-route to improve IC design quality and time to results

Fusion Compiler uses a single, scalable data model, updated optimization engines, and an analysis backbone based on the industry’s golden sign-off tools.

November 15, 2018

Xpedition updated for schematic verification and DFT

Mentor’s flagship PCB suite is aiming to offer another ‘shift left’ in verification as respins rise.

November 14, 2018

Case study: Achieving earlier signoff convergence and a ‘shift left’ for P&R at Qualcomm

Qualcomm has described its use of Calibre RealTime Digital to enhance its P&R flow.

November 13, 2018

Accellera updates UVM reference implementation

Accellera has updated the reference implementation for the Universal Verification Methodology to reflect the changes made for the latest release of the standard.

November 7, 2018

Symphony raises crescendo for AMS simulation

Mentor’s updated AMS platform claims performance boost by obviating ‘legacy’ technology.

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