Clock-tree generation is coming under increased scrutiny because of its role in dynamic power consumption and problems caused by on-chip PVT variation.
FinFETs present a number of problems with respect to dynamic power consumption. Design techniques are being re-evaluated to deal with the issue.
Dynamic voltage and frequency scaling is effective for low-power VLSI design. Body or back bias can provide additional control over leakage and performance.
These days, when it comes to innovation: The car's the star - not the stooge.
How to accelerate many aspects of software testing by using virtual prototypes to stand in for target hardware from early in the development cycle.
A look at the challenge of Ethernet verification as data rates rise and the standard is applied in a wider variety of applications.
Expert Insight Accelerating PCIe verification
A look at the challenges involved in PCIe verification as the standard evolves to 4.0 and beyond.
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Expert Insight Where tools end and best practices begin
Learn how you can benchmark your design practices against the most successful players in the PCB market – and why you should.
- Article PCB tool innovation from the middle out
- Article Simulation predicts performance of automotive Ethernet
Expert Insight Enabling energy-efficient wireless IoT designs with Bluetooth Smart IP
A quick look at Bluetooth Smart and how it can be used to provide network connections in certain classes of IoT application.
- Article Floorplanning complex SoCs with multiple levels of physical hierarchy
- Article How new RTL floorplanning techniques speed physical design
Article Using end-to-end prototyping to reduce the impact of rising software content in SoCs
A look at using end-to-end prototyping to ease architecture development, hardware/software integration, and system validation in SoC designs
- Article FPGA design for functional safety
- Expert Insight 2016 – A continuation of change
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