1. Moores Cores - featimg
    Article Using optimized design flows to meet PPA goals for SoC processor cores

    How tuning a design flow can help optimize SoC processor cores for power, performance and area – and make it possible to do different optimisations for different cores on the same SoC.

  2. Article Design enablement and entitlement for 14/16nm finFET processes
  3. Article Exploiting Verific tools and features at the right abstraction level


  1. Bundles help group signals on package pinouts
    Article Multi-fabric planning for more efficient PCB design

    A coordinated design methodology fine-tunes chip-to-package PCB layout and routing that involves high-integration devices.

  2. Article The future of thermal simulation for electronics products
  3. Article Zeroing in on the problems of fast board-level interconnect


  1. Enabling symmetric multiprocessing for embedded Linux on ARC processor cores feature image
    Article Enabling symmetric multiprocessing for embedded Linux on ARC processor cores

    This article looks at some of the key architectural and implementation decisions Synopsys has made in developing a version of its HS series of licensable processor cores to serve the embedded Linux market

  2. Expert Insight Six key criteria for deciding to migrate to a finFET process
  3. Expert Insight Using standardized design flows to cut time to tape-out – and speed design-flow evolution


  1. ZeBu server
    Article Hybrid emulation for development, validation and verification

    This article introduces hybrid emulation, a combination of emulation and virtual prototypes, and its application to tasks such as architecture validation, early software development and software-driven verification.

  2. Article The evolution of software debug using hardware emulators
  3. Article Using Ethernet in automotive networks



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