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data validation featured image

The three critical data validation points in a design flow

Why design data integrity matters from cell design to tapeout. These techniques will help ensure your validation process is as comprehensive as possible.

Guides

  • Portable stimulus

    EDA - Standards, Technologies

    Accellera’s Portable Stimulus standard aims to improve verification efficiency and the reuse of test IP across the entire design life cycle.

  • Dynamic power optimization

    EDA - Techniques

    FinFETs present a number of problems with respect to dynamic power consumption. Design techniques are being re-evaluated to deal with the issue.

  • Monolithic 3DIC for SoC

    EDA - Technologies

    Monolithic 3DIC integration may provide a viable alternative to conventional 2D scaling for SoCs if manufacturing problems can be overcome.

Expert Insights

Steve Mensor

How eFPGAs will help build the brave new world of AI

Steve Mensor is vice president of marketing at Achronix with more than 25 years of senior management experience in the FPGA industry. Prior to joining Achronix, he was senior director of marketing at Altera. Mensor holds an MBA from Santa Clara University and a Bachelor of Science degree in Electrical Engineering from UC Santa Barbara.

Artificial intelligence and machine learning require the performance and flexibility offered by embedded FPGA (eFPGA) technology.

Guido Groeseneken

Reliability research helps to create new technologies

Insights from research into reliability at Imec led to self-learning chips, security technologies, and finFET biosensors.

Ashish Darbari

Doc Formal: My 10 golden rules

Ashish Darbari sets out the fundamental qualities of a successful formal verification project.

EDA

  1. Two wafers fabbed at Imec
    Article 3DIC technology provides performance boosts

    3D integration technology has split into a number of different approaches, each of which brings a different combination of benefits in terms of performance.

  2. Expert Insight How hardware emulation helps drones take flight
  3. Expert Insight A better way to merge design files for physical verification

PCB

  1. Channel Operating Margin featured image
    Article How Channel Operating Margin helps Gigabit Ethernet PCB analysis

    The COM methodology is being extended and more widely adopted across high-speed designs thanks to deeper tool integration.

  2. Expert Insight The Wally Rhines interview – Part Two: AI, automotive and security
  3. Article The basic PCB rules for a successful IoT design

IP

  1. VR headset
    Article Keeping up with the bandwidth demands of embedded displays

    Increasing resolutions and rising frame rates are making it more challenging than ever to drive embedded displays effectively.

  2. Article Driving 4K smartphone and AR/VR device displays
  3. Expert Insight Optimizing power and performance trade-offs in CNN implementations for embedded vision

Embedded

  1. Michael Thompson is the senior manager of product marketing for the DesignWare ARC processors at Synopsys
    Expert Insight Bringing AI into our lives

    Using specialised processors to implement key AI computation tasks such as CNNs.

  2. Article Using hardware secure modules to protect SoCs
  3. Article Choosing between DDR4 and HBM in memory-intensive applications

Briefing

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