Latest

EDA

  1. Veloce2 emulator
    Article Assertion-based emulation

    Combining assertion-based verification techniques with emulation makes for easier debug, better coverage and greater functional efficiency.

  2. Article Overcoming complex CDC violations with a concurrent block and SoC-level verification flow
  3. Article Using formal techniques to help tackle SoC verification challenges

PCB

  1. Bundles help group signals on package pinouts
    Article Multi-fabric planning for more efficient PCB design

    A coordinated design methodology fine-tunes chip-to-package PCB layout and routing that involves high-integration devices.

  2. Article The future of thermal simulation for electronics products
  3. Article Zeroing in on the problems of fast board-level interconnect

IP

  1. Expert Insight - Holisitic approach to IoT chip design_feat img.jpg
    Expert Insight A holistic approach to IoT chip design

    A look at the challenges of designing chips for the Internet of Things, or IoT, and some of the responses to those challenges

  2. Article How to use pattern matching to improve automatic waiver management
  3. Article Enabling symmetric multiprocessing for embedded Linux on ARC processor cores

Embedded

  1. Dr Lauro Rizzatti is an independent verification consultant. You can contact him at lauro AT rizzatti DOT com
    Expert Insight The budget case for emulation

    Need to convince your FD of emulation’s growing ROI and the need to invest? Click here and ‘Forward’

  2. Article Accelerating ‘time to prototype’ with ProtoCompiler
  3. Article Hybrid emulation for development, validation and verification

Briefing

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