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Automating test from IP to SoC levels with portable stimulus

This introduction to the new Accellera standard includes a demo of portable stimulus in use to fully verify a DMA engine.

Guides

  • Portable stimulus

    EDA - Standards, Technologies

    Accellera’s Portable Stimulus standard aims to improve verification efficiency and the reuse of test IP across the entire design life cycle.

  • Dynamic power optimization

    EDA - Techniques

    FinFETs present a number of problems with respect to dynamic power consumption. Design techniques are being re-evaluated to deal with the issue.

  • Monolithic 3DIC for SoC

    EDA - Technologies

    Monolithic 3DIC integration may provide a viable alternative to conventional 2D scaling for SoCs if manufacturing problems can be overcome.

Expert Insights

Ashish Darbari

Doc Formal: The evolution of formal verification – Part One

Ashish Darbari is director of product management at OneSpin Solutions.

Doc Formal begins a two-part series by describing the solid and well-established foundations of formal verification.

Richard Solomon

Using CCIX to implement cache coherent heterogeneous multiprocessor systems

CCIX is a cache coherency protocol, based on PCI Express, for interconnecting high-performance heterogenous multiprocessing systems.

Gordon Cooper

High-resolution visual recognition needs high-performance CNNs

Quadrupling the performance of a dedicated CNN engine within an embedded vision processing core brings more complex graph processing within reach.

EDA

  1. Ashish Darbari is director of product management at OneSpin Solutions.
    Expert Insight Introducing Doc Formal: the journey so far

    Our new columnist introduces himself and traces the progress of formal verification over the last two decades. Join the discussion.

  2. Expert Insight The Wally Rhines interview – Part Two: AI, automotive and security
  3. Expert Insight The Wally Rhines interview – Part One: Mentor as a Siemens business

PCB

  1. Danit Atar is a senior marketing programs specialist at Mentor Graphics
    Expert Insight A reliability checklist for the Connected World

    Reliability is growing to match security as a key challenge for PCB design. These tools and techniques will help you rise to it.

  2. Article Noise and manufacturing concerns control design for power-module makers
  3. Expert Insight Where tools end and best practices begin

IP

  1. Dana Neustadter is a senior manager of product marketing for Synopsys’ Security IP solutions.
    Expert Insight Protecting content transmitted over USB Type-C connections

    SoC developers who want to use USB Type-C in their designs will have to implement HDCP 2.2 content protection so that the target devices will be able to play protected content.

  2. Expert Insight Building processors to enable intuitive human-machine interaction
  3. Expert Insight Building faster data centers with 25G Ethernet

Embedded

  1. subthreshold featimg
    Article Applying sub-threshold circuit techniques to IoT device design

    Operating at near-threshold or sub-threshold voltages reduces static and dynamic power consumption, at the cost of design complexity.

  2. Article Accelerating the development of powertrain ECUs with virtual hardware
  3. Article Teaching computers to recognize a smile (or frown, or grimace or…)

Briefing

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