Clock-tree generation is coming under increased scrutiny because of its role in dynamic power consumption and problems caused by on-chip PVT variation.
FinFETs present a number of problems with respect to dynamic power consumption. Design techniques are being re-evaluated to deal with the issue.
Dynamic voltage and frequency scaling is effective for low-power VLSI design. Body or back bias can provide additional control over leakage and performance.
Learn how you can benchmark your design practices against the most successful players in the PCB market - and why you should.
How to ease AMS verification using tools that improve simulation debug, ease IP integration, and speed design analysis and centering
What can you add to a challenging project without pushing out deadlines and muddling communication?
Article Using end-to-end prototyping to reduce the impact of rising software content in SoCs
A look at using end-to-end prototyping to ease architecture development, hardware/software integration, and system validation in SoC designs
- Expert Insight Reachable or reached, covered or coverable – is it just semantics?
- Expert Insight 2016 – A continuation of change
Article PCB tool innovation from the middle out
Mid-market users are driving richer features and cost competition into PCB design software like never before, largely thanks to the Internet of Things.
- Article Simulation predicts performance of automotive Ethernet
- Article Eight steps for efficient PCB manufacturing and assembly – Part Two
Expert Insight Processor configuration for low-power IoT applications
Many IoT applications have a very strict energy budget. SoC designers targeting the IoT have to trade off providing the features that the market demands with the power budget the applications demand. What are their options?
- Article Integrated IP supports cost-efficient USB Type-C
- Expert Insight Taking an end-to-end approach to IoT security
Article Emulation overcomes the five main IoT and networking verification challenges
More protocols, multibillion-gate designs, minimized power, burgeoning software and, for networking, hundreds of switch and router ports emphasize the need for scalable, virtualized emulation.
- Article Enabling greater reliability, scalability and flexibility of GPU emulation at AMD using a hybrid virtual-machine based approach
- Article FPGA-based prototyping 3: Which board do I need?
View All Sponsors