A number of effects have led to a dramatic increase in interconnect resistance in the sub-32nm process nodes that demands the use of smarter routing.
Increasingly complex design rules in 14nm and 16nm make it harder to connect local routing to the inputs and outputs (pins) of standard cells.
X propagation within RTL simulations can hide fatal bugs. Uncovering and eliminating the effect improves design quality and avoids respins.
Reset is no longer simply an 'X' issue but also feeds into power optimization. Catching issues early greatly speeds verification.
Fighter pilots have long trusted highly sophisticated automation. That’s how you can meet the challenges posed by advanced PCB design techniques.
Lithography is only just beginning to play a role in cell IP selection but early analysis already matters.
Expert Insight The rise of hardware-assisted verification
Verification of hardware and software has become a key bottleneck for chip design. Hardware-assisted verification is removing that bottleneck.
- Expert Insight Next wave of innovation in verification technology must come from integration
- Article Catching X-propagation related issues at RTL
Expert Insight Make best-practice lean NPI for PCB a reality
Shifting DFM validation earlier in the flow speeds NPI, cuts respins and gives you a critical edge.
- Article Bring decaps under control with automated analysis
- Expert Insight Henny Youngman’s advice to PCB designers
Expert Insight Using HAPS to streamline IP to SoC integration
The HAPS prototyping system can help designers integrate IP into SoCs more quickly.
- Expert Insight Consistency key to gaining the advantages of IP integration
- Article FPGA-based prototyping to validate the integration of IP into an SoC
Article Debugging with virtual prototypes – Part Four
The fourth installment discusses the extra levels of debug capability available when using virtual prototypes through the example of an ARM big.LITTLE-based embedded system.
- Expert Insight Power management in embedded systems – new thinking required
- Article Debugging with virtual prototypes – Part Three
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