Accellera’s Portable Stimulus standard aims to improve verification efficiency and the reuse of test IP across the entire design life cycle.
FinFETs present a number of problems with respect to dynamic power consumption. Design techniques are being re-evaluated to deal with the issue.
Monolithic 3DIC integration may provide a viable alternative to conventional 2D scaling for SoCs if manufacturing problems can be overcome.
Ashish Darbari concludes his series on the need for new verification strategies by considering Debug and Signoff & Review.
Richard Pugh shows how the fast-growing market for drone silicon highlights emulation's power where high data volumes are critical.
In part two of this series, Ashish Darbari introduces a checklist to address verification challenges and build the meta model.
Expert Insight Assessing the true cost of node transitions
John Ferguson reviews the key capital metrics you need to review when deciding whether to move to a new process.
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- Article Catch multi-patterning errors clearly at advanced nodes
Article How Channel Operating Margin helps Gigabit Ethernet PCB analysis
The COM methodology is being extended and more widely adopted across high-speed designs thanks to deeper tool integration.
- Expert Insight The Wally Rhines interview – Part Two: AI, automotive and security
- Article The basic PCB rules for a successful IoT design
Expert Insight Making security a profit center for silicon
The assumption has been that extra security eats into profit margins. But with some lateral thinking it can actually improve the bottom line.
- Article Combining USB Type-C and DisplayPort support in portable implementations
- Article How HLS is giving shape to glasses-free 3DTV
Expert Insight Supporting higher-resolution displays without major system redesign
Using VESA’s Display Stream Compression (DSC) standard to enable visually lossless performance and low latency for ultra-high-definition displays.
- Expert Insight Using CCIX to implement cache coherent heterogeneous multiprocessor systems
- Article Applying sub-threshold circuit techniques to IoT device design
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