Clock-tree generation is coming under increased scrutiny because of its role in dynamic power consumption and problems caused by on-chip PVT variation.
FinFETs present a number of problems with respect to dynamic power consumption. Design techniques are being re-evaluated to deal with the issue.
Dynamic voltage and frequency scaling is effective for low-power VLSI design. Body or back bias can provide additional control over leakage and performance.
Considering design style, assertions, engines and coverage can help ease the development of an effective formal verification test plan
Eight issues to consider when choosing an FPGA tool, including risk minimisation, routing issues, ability to iterate, IP freedom and more
Designers will have to update development processes to achieve the rigorous safety certifications required in automotive, rail, avionics and similar markets
Article Verifying MIPI interfaces in SoCs
Verifying MIPI interfaces including CSI-2, CPHY, DPHY, MPY, Unipro and the UFS host controller on complex SoCs – should you make or buy the necessary VIP?
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Article Simulation predicts performance of automotive Ethernet
Ethernet is set to become one of the key communications standards for automotive. Early system-level simulation lets designers gauge performance before moving to hardware prototypes.
- Article Eight steps for efficient PCB manufacturing and assembly – Part Two
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Article Developing and integrating configurable GPU IP using FPGA-based prototyping
How Imagination Technologies used FPGA-based prototyping to develop its GPU IP and integrate it into a real world system
- Expert Insight Neural networks bring advanced object detection to embedded vision
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Article Handling power dropouts in MSP430 energy-harvesting designs
Software for energy-harvesting designs needs to cope with sudden power failures. FRAM storage can reduce the power and performance penalties of full resets.
- Article Cortex-A72: microarchitecture tweaks focus on efficiency
- Expert Insight Design reaches out from the edge
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