Extracting finFET parasitics means a shift to 3D models, field solvers for greater accuracy, and MCMM techniques.
The costs of advanced lithography techniques at 1xnm, and the yield and reliability risks from the resultant process variation, will stop many companies getting the typical economic advantages of scaling.
In pursuit of better design methodologies coupled with shrinking design-cycles, real-number modeling is emerging as a smart verification choice.
Expert Insight Slow winter or new spring for hardware design?
Problems with process scaling make it seem as though the long era of innovative, lucrative hardware design is coming to an end. But is that really the case?
- Article How high-level synthesis helps optimize low power designs – Part One
- Expert Insight The requirements for complete RTL signoff
Expert Insight IPC-2581 transfer standard gains momentum
Forty six companies have joined the consortium developing the increasingly important IPC-2581 data transfer standard for PCB designs.
- Article Keeping high-speed designs clean with ERC
- Expert Insight Focus on product creation for effective design
Article DRAM interfaces for mobile and networking designs
Mobile and networking platforms need high bandwidth, low power consumption, and small footprint. These needs drove standards, such as LPDDR4, Wide I/O 2 and Hybrid Memory Cube.
- Article Accelerating process migration in advanced ASIC design at Bull
- Article Why use USB 3.0?
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