Accellera’s Portable Stimulus standard aims to improve verification efficiency and the reuse of test IP across the entire design life cycle.
FinFETs present a number of problems with respect to dynamic power consumption. Design techniques are being re-evaluated to deal with the issue.
Monolithic 3DIC integration may provide a viable alternative to conventional 2D scaling for SoCs if manufacturing problems can be overcome.
The challenge for designers is to find ways of providing high levels of security in low-cost devices that have become worthwhile targets because of their role as gateways to more valuable information.
Why is verification still such a challenge in spite of all the technologies and techniques being brought to bear
The assumption has been that extra security eats into profit margins. But with some lateral thinking it can actually improve the bottom line.
Article Yield is money – and other truths of diagnosis-driven yield analysis
Diagnosis-driven yield analysis identifies the cause of systematic yield loss to speed the ramp-to-volume on new processes and improve yield on mature ones.
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Expert Insight The Wally Rhines interview – Part Two: AI, automotive and security
This second part looks at Mentor’s views on flow neutrality, how DRS360 was born, machine learning and the threat from embedded Trojans.
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Article Combining USB Type-C and DisplayPort support in portable implementations
Using USB Type-C connectors to combine both USB-C 3.1 and DisplayPort data streams, to support data, audio, video and power connections on a single port
- Expert Insight Supporting higher-resolution displays without major system redesign
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Article Applying sub-threshold circuit techniques to IoT device design
Operating at near-threshold or sub-threshold voltages reduces static and dynamic power consumption, at the cost of design complexity.
- Expert Insight High-resolution visual recognition needs high-performance CNNs
- Article Staging virtual prototype bring-up for faster software development
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