Expert Insights

Rich Collins  |  November 6, 2017

Fighting the war of escalation in embedded systems security

The challenge for designers is to find ways of providing high levels of security in low-cost devices that have become worthwhile targets because of their role as gateways to more valuable information.
Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , ,   |  Organizations:   |  
Michael Chen  |  October 14, 2017

Making security a profit center for silicon

The assumption has been that extra security eats into profit margins. But with some lateral thinking it can actually improve the bottom line.
Pedro Ricardo Miguel  |  August 7, 2017

Supporting higher-resolution displays without major system redesign

Using VESA's Display Stream Compression (DSC) standard to enable visually lossless performance and low latency for ultra-high-definition displays.
Topics: Embedded - Architecture & Design, IP - Assembly & Integration  |  Tags: , , , , ,   |  Organizations: , ,   |  
Richard Solomon  |  July 18, 2017

Using CCIX to implement cache coherent heterogeneous multiprocessor systems

CCIX is a cache coherency protocol, based on PCI Express, for interconnecting high-performance heterogenous multiprocessing systems.
Gordon Cooper  |  June 29, 2017

High-resolution visual recognition needs high-performance CNNs

Quadrupling the performance of a dedicated CNN engine within an embedded vision processing core brings more complex graph processing within reach.
Dana Neustadter  |  June 16, 2017

Protecting content transmitted over USB Type-C connections

SoC developers who want to use USB Type-C in their designs will have to implement HDCP 2.2 content protection so that the target devices will be able to play protected content.
Topics: IP - Selection  |  Tags: , ,   |  Organizations:   |  
Michael Thompson  |  May 24, 2017

Building processors to enable intuitive human-machine interaction

The increasing complexity of human-machine interfaces is challenging processor designers to produce the necessary performance within a limited power budget
Topics: IP - Selection  |  Tags: , , ,   |  Organizations:   |  
John Swanson  |  May 9, 2017

Building faster data centers with 25G Ethernet

The rising bandwidth demands of data centres have driven the development of 25G Ethernet, which will also form a pathway to 100G.
Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , , , ,   |  Organizations: ,   |  
Angela Raucher  |  March 7, 2017

An accelerated approach to achieving automotive safety with ASIL D

Addressing the challenge of achieving ASIL D certification of the functional safety of an SoC for use in the safety-critical path of an automotive system.
Anders Nordstrom  |  January 18, 2017

Are you formally connected?

To check the connectivity of an SoC, first you have to define what a connection is...
Topics: IP - Assembly & Integration, EDA - Verification  |  Tags: ,   |  Organizations:   |  

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