EDA

Axiomise founder and formal expert Ashish Darbari will present across multiple events at DAC in San Francisco next week.

The tool development specialist will demonstrate its broad portfolio at next week's Design Automation Conference in San Francisco.

Primarius Technologies is making additions to its portfolio of library-design and verification tools at DAC next week.

Siemens and Nvidia have agreed to work more closely together to drive the development of higher-fidelity digital twins.

MachineWare claims it can reach 2GHz throughput with instruction-set simulator for RISC-V processors.

CXL is a strongly-backed technology aimed at improving connectivity across datacenters handling high demand HPC and AI applications.

Intel expects to double logic density through metal scaling and smaller cells with upcoming process.

TSMC calls for modular EDA flows and increased use of hierarchical verification to support complex 3DIC designs.

TSMC has certified the Aprisa place-and-route software from Siemens Digital Industries Software for the N5 and N4 process technologies.

Real Intent has upgraded its Meridian CDC clock-domain crossing sign-off tool, with support for multimode-aware dynamic models.