EDA

July 5, 2022

Primarius adds to library-development lineup

Primarius Technologies is making additions to its portfolio of library-design and verification tools at DAC next week.
June 30, 2022

Siemens and Nvidia aim to bring more virtual reality to digital twins

Siemens and Nvidia have agreed to work more closely together to drive the development of higher-fidelity digital twins.
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June 28, 2022

Aachen spinout claims fastest RISC-V simulator

MachineWare claims it can reach 2GHz throughput with instruction-set simulator for RISC-V processors.
June 28, 2022

Coherency verification for CXL

CXL is a strongly-backed technology aimed at improving connectivity across datacenters handling high demand HPC and AI applications.
June 20, 2022

Intel talks 4 at VLSI

Intel expects to double logic density through metal scaling and smaller cells with upcoming process.
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June 20, 2022

3DIC design needs more hierarchy, TSMC says

TSMC calls for modular EDA flows and increased use of hierarchical verification to support complex 3DIC designs.
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June 16, 2022

TSMC certifies Aprisa for N5 and N4

TSMC has certified the Aprisa place-and-route software from Siemens Digital Industries Software for the N5 and N4 process technologies.
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June 13, 2022

Real Intent updates reset and clock-domain crossing tools

Real Intent has upgraded its Meridian CDC clock-domain crossing sign-off tool, with support for multimode-aware dynamic models.
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June 10, 2022

Cadence adds machine learning to electrical simulation

Cadence has used machine-learning techniques originally developed for its Cerebrus tool to build software that can speed up multiphysics analysis.
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June 1, 2022

Oxide DRAM gains traction at VLSI Symposium

VLSI Symposium 2022 will show the rapid development taking place in oxide-based replacements for traditional DRAM cells as well as the emerging area of memory-based low-power machine learning.

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