September 5, 2022
5G IC designs have needed aggressive innovation across many elements and more use of FD-SOI that both pose parasitic extraction challenges.
July 11, 2022
Aki Fujimura of mask specialist D2S sees curved shapes as key to improving die yield and performance but it needs EDA support.
May 22, 2020
A white paper details the parasitic extraction technology needed to help design high-performance RF SoCs.
April 2, 2019
Cadence has launched a web-based EDA service the company hopes will ease the transition from self-hosted computing to more flexible cloud-based development.
April 22, 2015
Mentor Graphics has launched Calibre xACT, a tool that uses deterministic algorithms to extract parasitics from complex finFET and other nanometer processes.
July 15, 2014
Cadence has launched a parasitic-extraction tool that takes better advantage of multiple computers and which has been certified for TSMC's 16nm finFET process.
July 2, 2014
STMicroelectronics is using the OpenPDK standard from Si2 to speed up the production and delivery of process design kits (PDKs) and asks for wider adoption by foundries.
March 26, 2012
At the SNUG event this week, Synopsys is taking the wraps off its plans to support 3DIC, with updates to tools for physical design and verification.