CXL is a strongly-backed technology aimed at improving connectivity across datacenters handling high demand HPC and AI applications.
Intel expects to double logic density through metal scaling and smaller cells with upcoming process.
TSMC calls for modular EDA flows and increased use of hierarchical verification to support complex 3DIC designs.
TSMC has certified the Aprisa place-and-route software from Siemens Digital Industries Software for the N5 and N4 process technologies.
Real Intent has upgraded its Meridian CDC clock-domain crossing sign-off tool, with support for multimode-aware dynamic models.
Cadence has used machine-learning techniques originally developed for its Cerebrus tool to build software that can speed up multiphysics analysis.
VLSI Symposium 2022 will show the rapid development taking place in oxide-based replacements for traditional DRAM cells as well as the emerging area of memory-based low-power machine learning.
Recognizing the 75th anniversary of the transistor in December, the 68th IEDM has taken on the theme of looking at “transformative devices to address global challenges”.
Real Intent has extended the fault coverage of its Meridian DFT static sign-off tool with improvements to the reporting of issues and the ability to track down root causes.
DAC returns to San Francisco in July for its 59th year as a purely in-person event.
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