Expert Insights

Sanjana Bhattacharya  |  April 26, 2017

Eight tips for performing effective unreachability analysis

Unreachability analysis can help find design code that can never be executed, helping verification engineers refine their coverage goals.
Topics: EDA - Verification  |  Tags: , , ,   |  Organizations:   |  
Ron Press  |  April 10, 2017

Drawing on hierarchical DFT to benefit all designs and flows

Hierarchical DFT is vital for large, complex designs. Users still to transition to the technique can nevertheless exploit its pattern reuse strategies as they move toward adoption.
Topics: EDA - DFT  |  Tags: , , ,   |  Organizations: ,   |  
Anders Nordstrom  |  March 28, 2017

Are you testing your test?

Using formal core coverage to understand the effectiveness of formal coverage verification strategies in SoC design.
Paul Dempsey  |  March 15, 2017

DVCon China launches this April in Shanghai

DVCon China general chair Andy Liu discusses Accellera’s new addition to its design and verification conference series (简体中文).
Topics: EDA - ESL, IC Implementation, Verification  |  Tags: , , , , , , ,   |  Organizations: , , ,   |  
Anders Nordstrom  |  March 9, 2017

The art of abstraction

Successful FPV of large designs requires that parts of the design are abstracted. Learning how and where to apply abstractions will result in more proven properties and more bugs found.
Angela Raucher  |  March 7, 2017

An accelerated approach to achieving automotive safety with ASIL D

Addressing the challenge of achieving ASIL D certification of the functional safety of an SoC for use in the safety-critical path of an automotive system.
Richard Pugh  |  January 27, 2017

The SSD memory revolution

Richard Pugh looks at how innovations highlighted during the recent International Memory Workshop are driving the solid state drive (SSD) market.
Anders Nordstrom  |  January 18, 2017

Are you formally connected?

To check the connectivity of an SoC, first you have to define what a connection is...
Topics: IP - Assembly & Integration, EDA - Verification  |  Tags: ,   |  Organizations:   |  
Derek Bouius  |  January 11, 2017

Three steps to implementing robust encryption

A look at the steps necessary to validate implementations of the cryptographic algorithms that are used to protect today’s devices and communications infrastructure.
Danit Atar  |  December 29, 2016

A reliability checklist for the Connected World

Reliability is growing to match security as a key challenge for PCB design. These tools and techniques will help you rise to it.

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