Expert Insights

Pranav Ashar  |  February 25, 2015

DO-254 without tears

Compliance with aviation’s hardware design standard is seen as a ‘tough ask’, but EDA’s own evolution has made that process easier than you may think.
Topics: EDA - Verification  |  Tags: , , , ,   |  Organizations:   |  
Marco Casale-Rossi  |  February 3, 2015

Automotive ICs drive advanced design at established nodes

Designers working on automotive ICs, to be built on established processes, can benefit from the power of design tools developed for advanced processes.
Topics: EDA - IC Implementation  |  Tags: , ,   |  Organizations:   |  
Dunstan Power  |  January 27, 2015

Assessing technical design trade-offs during product development

Understanding design trade-offs can help achieve the correct balance of functionality, cost, and time to market, says design consultancy chief
Sarath Kirihennedige  |  January 13, 2015

Taking control of constraints verification

Constraints are a vital part of IC design, yet the management and verification of constraints’ quality, completeness, consistency and fidelity to the designer’s intent is an evolving art.
Topics: Uncategorized  |  Tags: , , , ,   |  Organizations:   |  
Ron Lowman  |  January 7, 2015

A holistic approach to IoT chip design

A look at the challenges of designing chips for the Internet of Things, or IoT, and some of the responses to those challenges
Lauro Rizzatti  |  November 6, 2014

The budget case for emulation

Need to convince your FD of emulation’s growing ROI and the need to invest? Click here and ‘Forward’
Yervant Zorian  |  October 10, 2014

Finding and fixing faults in finFET memories

FInFET memories have different defects than those based on planar transistors. Here's how to test and repair them.
Topics: IP - Assembly & Integration, EDA - DFT  |  Tags: , , , ,   |  Organizations:   |  
Pranav Ashar  |  September 30, 2014

The evolution of lint

Lint is no longer just about checking RTL code. It already incorporates functional verification within a three-stage analysis. Time to look again at a 'familiar' technology.
Topics: EDA - Verification  |  Tags: , , ,   |  Organizations:   |  
John Ferguson  |  September 10, 2014

If we’d only known then what we know now

Innovation in physical verification is driven by incoming nodes but new tools and features can and should be fed back up the technology chain.
Topics: EDA - DFM, Verification  |  Tags: , , , ,   |  Organizations:   |  
Prasad Saggurti  |  August 27, 2014

Six key criteria for deciding to migrate to a finFET process

Moving to a finFET process means considering process readiness, cost and yield, as well as the traditional power, performance and area advantages
Topics: EDA - IC Implementation, IP - Selection  |  Tags: , ,   |  Organizations: , , , , ,   |  

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