Expert Insights

Mike Borza  |  June 10, 2016

Laying the foundations of a more secure IoT

The challenges of creating a more secure IoT, and the role that hardware roots of trust can play in doing so.
Anders Nordstrom  |  May 30, 2016

Comparing your design to itself – a crucial part of verification

Sequential equivalence checking can help trap errors introduced by clock gate insertion, uninitialised registers, and X propagation issues.
Andrew Macleod  |  April 26, 2016

Still using Moore’s Law to beat up on the automotive industry?

These days, when it comes to innovation: The car's the star - not the stooge.
Victor Reyes  |  April 14, 2016

Scaling automated software testing with Virtualizer Development Kits

How to accelerate many aspects of software testing by using virtual prototypes to stand in for target hardware from early in the development cycle.
Shenoy Mathew  |  April 13, 2016

The challenge of verifying the evolving Ethernet standard

A look at the challenge of Ethernet verification as data rates rise and the standard is applied in a wider variety of applications.
Topics: EDA - Verification  |  Tags: , , ,   |  Organizations:   |  
Paul Graykowski  |  April 6, 2016

Accelerating PCIe verification

A look at the challenges involved in PCIe verification as the standard evolves to 4.0 and beyond.
Topics: EDA - Verification  |  Tags: , , ,   |  Organizations:   |  
Manuel Mota  |  March 21, 2016

Enabling energy-efficient wireless IoT designs with Bluetooth Smart IP

A quick look at Bluetooth Smart and how it can be used to provide network connections in certain classes of IoT application.
Topics: IP Topics, IP - Selection  |  Tags: , ,   |  Organizations:   |  
Anders Nordstrom  |  March 1, 2016

Exploiting the power of reset in formal verification

The reset state of a design can have a huge impact on the scope and correctness of verification, especially when formal techniques are applied.
Topics: EDA - Verification  |  Tags: , ,   |  Organizations:   |  
David Wiens  |  February 11, 2016

Where tools end and best practices begin

Learn how you can benchmark your design practices against the most successful players in the PCB market - and why you should.
Geoffrey Ying  |  February 10, 2016

Speeding AMS verification by easing simulation debug and analysis

How to ease AMS verification using tools that improve simulation debug, ease IP integration, and speed design analysis and centering

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