Expert Insights

Paul Dempsey  |  October 3, 2016

Wally Rhines separates the signal from the noise

Mentor's chairman and CEO has dug into why chip sales forecasts often miss the target and suggests some tools for assessing the Internet of Things.
Paul Dempsey  |  September 9, 2016

The inside track on emulation growth

Analysts say there is a $1B market on the horizon. We talk with Mentor's Jean-Marie Brunet about where such a number could come from.
Phil Brumby  |  August 12, 2016

How to analyze embedded GUI performance effectively

Users now demand a smooth GUI experience. Making sure they get one requires harvesting and understanding key metrics.
Mike Thompson  |  July 28, 2016

A vision of autonomous driving

Enabling autonomous driving will demand embedded processors that can process multiple HD video streams and analyse them using convolutional neural networks.
Topics: IP - Selection  |  Tags: , ,   |  
Lauro Rizzatti  |  July 22, 2016

The emulator thrives as verification models mushroom

Emulators have come a long way since their first introduction nearly three decades ago.
Hans van der Schoot  |  July 15, 2016

Team UVM and emulation for testbench acceleration

To verify large, complex designs and meet time-to-market, you must use both simulation and emulation.
Topics: EDA - Verification  |  Tags: , , , ,   |  Organizations:   |  
Hezi Saar  |  July 13, 2016

I3C specification updates I2C for sensor subsystems

A look at the ways in which the I2C serial interface specification is being updated to form I3C, and its use in sensor subsystems
Topics: IP - Selection  |  Tags: , ,   |  Organizations: ,   |  
Anders Nordstrom  |  July 5, 2016

Are you formally secure?

A look at how formal verification strategies can be used to check the security feature of complex SoCs for potential data leakage and data integrity issues
Topics: EDA - Verification  |  Tags: , , ,   |  Organizations:   |  
Mike Borza  |  June 10, 2016

Laying the foundations of a more secure IoT

The challenges of creating a more secure IoT, and the role that hardware roots of trust can play in doing so.
Anders Nordstrom  |  May 30, 2016

Comparing your design to itself – a crucial part of verification

Sequential equivalence checking can help trap errors introduced by clock gate insertion, uninitialised registers, and X propagation issues.


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