EDA

June 9, 2020

Real Intent tries to shift left on DFT

Real Intent has launched a DFT tool intended to relax the bottlenecks that occur as an SoC project moves into its final phase ahead of tapeout.
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May 28, 2020

IEDM plans for San Francisco in December

The IEEE plans to stage the 66th International Electron Device Meeting as a physical event in mid-December.
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May 26, 2020

DVCon 2020 to repeat sessions online

DVCon US is to repeat sessions online from today until the middle of August, with exclusive access to registered attendees through early June.
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May 26, 2020

Nanometer scaling puts focus on power at VLSI in June

Adaptive power-aware clocking and buried rails are among the techniques to be explored at the 2020 VLSI Symposia.
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May 22, 2020

Parasitic extraction to guide capacitor usage in RF SoCs

A white paper details the parasitic extraction technology needed to help design high-performance RF SoCs.
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May 15, 2020

Coronavirus Resources: Mentor

Live and on-demand videos as well as You Tube 'tips and techniques' clips form part of a wide 'work at home' support package from Mentor.
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May 14, 2020

The price of reliability is constant vigilance

Papers presented at the recent IRPS conference showed the growing importance of lifetime monitoring to the problem of handling components as they age.
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May 6, 2020

Ultrawide neural engine fills a hole

Centaur opted for a superwide SIMD engine in an accelerator for a multicore x86 aimed at edge server applications that could take full advantage of spare die area.
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May 1, 2020

Coronavirus: DAC 2020 goes virtual

Leading electronic system design conference confirms move online this July with Covid-19 restrictions and concerns expected to persist.
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April 30, 2020

Scaling drives targeted analysis of reliability issues

Keynotes at this year’s IRPS conference focused on the way in which scaling is forcing changes to the way that the reliability aspects of semiconductors are examined.

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