EDA

Semiwise has developed transistor models for the GlobalFoundries 22FDX that cover operation at cryogenic temperatures.

DVCon Europe's keynotes will examine verification issues in connected cars and 5G networks.

At IEDM, TSMC is at the top of several papers that examine how 2D materials might be put into action as successors to silicon, alongside work from a variety of institutions on power integration and thermal management.

Tessent Multi-die extends the capabilities of the DFT suite in line with new standards intended to enable widespread adoption of interposer and stacked die strategies.

Cadence has brought the inputs for its AI-driven tools under the umbrella of a big-data collection platform and added functional verification to the list of products that use machine learning.

X-Fab is using IHP technology to add a 130nm silicon germanium process to its offering.

The system-in-package and module trends in system design promote bringing together physical (DRC) and electrical (LVS) verification.

Equivalence checking supports the efficient reuse of designs that reside on out-of-date silicon but remain valid in their own right.

5G IC designs have needed aggressive innovation across many elements and more use of FD-SOI that both pose parasitic extraction challenges.

Learn how one of the leading tool vendors addresses the security of its products and customer data through a ground-up cybersecurity strategy.