flash

June 16, 2021

Samsung moves further into 3D for denser flash

Samsung described at VLSI Symposia how it has used two further forms of stacking to increase flash capacity.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations:
December 17, 2020

Macronix proposes 3D to breathe life back into NOR flash

At IEDM this year, Macronix showed how a 3D architecture may bring back NOR flash, which stopped scaling a decade ago.
Article  |  Topics: Blog - IP  |  Tags: , , ,   |  Organizations:
June 18, 2020

Kioxia looks to waferscale flash drives for fast, low-cost storage

Waferscale SSDs are among the future drive architectures being explored by Kioxia, according to a keynote delivered at VLSI Symposia.
Article  |  Topics: Blog - EDA, Embedded, PCB  |  Tags: , , , , ,   |  Organizations:
January 10, 2020

MRAM pushes speed and endurance at IEDM

IEDM late last year showed how MRAM is being prepared for both FD-SOI and advanced finFET nodes.
Article  |  Topics: Blog - IP  |  Tags: , , ,   |  Organizations: , , ,
September 2, 2019

South Korea-Japan tensions continue to threaten memory supply chain

Concerns that the diplomatic stand-off between Seoul and Tokyo could hit the supply chain rose again this weekend as South Korean politicians made a surprise visit to disputed islands.
August 5, 2019

Flash Memory Summit: Memblaze demos Toshiba ULL NVM technology

The Chinese memory module specialist will preview the 2020 launch of its new solution based on the ultra low latency XL-Flash technology from Toshiba.
Article  |  Topics: Conferences, Blog - Embedded, - Product  |  Tags: , , ,   |  Organizations: ,
June 20, 2018

Micron sees NAND powering on as DRAM struggles

Despite the intense R&D going into storage-class and other novel forms of non-volatile memories, flash is set to continue as the bulk memory of choice, Micron executive claims in VLSI Symposia keynote.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations:
February 14, 2017

Microsemi takes flash FPGAs to 28nm

Microsemi has launched a family of non-volatile FPGAs that use a 28nm process to increase density over the previous SmartFusion devices.
Article  |  Topics: Blog - Embedded, PCB  |  Tags: , , ,   |  Organizations:
March 1, 2016

Mentor builds out verification IP for memory

About 1,600 new UVM System Verilog verification IP memory models will cut testbench development time and offer more time to increase coverage.
September 30, 2015

Vertical structures to debut at IEDM 2015

A novel approach to 3D NAND will be among the presentations at the International Electron Device Meeting to be held in Washington, DC in December.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations:

PLATINUM SPONSORS

Synopsys Cadence Design Systems Siemens EDA
View All Sponsors