Samsung Electronics

May 7, 2013

DAC 2013 Preview V: Rounding out the keynotes

Cadence-and-Synopsys co-founder and Freescale's new CEO join the DAC 2013 program, while Qualcomm and TI line up to discuss their work in mobile comms as well as taking your questions.
April 1, 2013

DAC 2013 Preview I: Putting users first and marking 50 years

In the first of our weekly DAC 2013 previews, we discuss program highlights with general chair Yervant Zorian, including an expanded Designer Track, keynotes and golden jubilee celebrations.
February 5, 2013

GlobalFoundries and Samsung talk finFET progress at CPTF

GlobalFoundries and Samsung described how they are readying finFETs for production at CPTF 2013 and how the 28nm processes will have a long shelf life.
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December 21, 2012

Samsung lines up tool providers for finFET tapeouts

14nm finFET test-chip designs are moving through Samsung's fab as ARM, Cadence Design Systems and Synopsys continue to check their flows on the new process.
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December 10, 2012

Germanium finFETs, TFETs and MEMS modelled at IEDM

The modelling track at IEDM 2012 showed how germanium could be used in 14nm finFETs. Other work focused on tunnel FETs and analyzing MEMS using Spice.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations: , , ,
November 16, 2012

3DIC – the advantages and the challenges of vertical integration

The advantages and challenges of 3D IC integration, as we add vertical functional integration options to the traditional planar integration brought by the progress of Moore's Law.
October 4, 2012

IEF: Samsung wants a skunk-works

Samsung Electronics is setting up a center in Silicon Valley to try to develop technologies that the company hopes will ultimately drive volume for its chipmaking operation.

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