thermal analysis

February 1, 2024

Future Facilities core drives Cadence thermal suite

Cadence has introduced a platform for performing thermal and thermal-stress analysis of subsystems, from 2.5D and 3DICs to PCBs and complete electronic assemblies.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , ,   |  Organizations:
July 12, 2022

Cadence buys thermal software for data-center digital twins

Thermal-simulation specialist Future Facilities has agreed to be acquired by Cadence Design Systems.
Article  |  Topics: Blog Topics  |  Tags: , , , , ,   |  Organizations:
February 8, 2022

How digital twin evaluations optimize STCO-based design

System Technology Co-optimization raises various SI, PI, thermal, mechanical and warp risks due to its use of advanced packaging. Early-stage prototyping mitigates them.
October 7, 2021

Combined database underpins 3DIC design suite

Cadence has built a unified database to support a group of tools to support the planning and implementation of 3DIC designs.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , , , ,   |  Organizations:
June 17, 2021

Standard arrives for thermal simulation data

A de facto standard for exchanging thermal information about designs has become JEDEC standard JEP181.
June 10, 2020

Onchip sensors aim for finer-granularity heat measurements

Moortec has reworked its thermal-sensing core design to allow for finer-grained use on SoCs being designed for the 5nm node.
Article  |  Topics: Blog - IP  |  Tags: , , ,   |  Organizations:
September 18, 2019

Cadence expands system analysis to thermal

Cadence has followed its launched of a parallelizable EM simulator with one that focuses on the thermal behavior of ICs through to multi-PCB assemblies.
Article  |  Topics: Blog - EDA, PCB  |  Tags: ,   |  Organizations:
February 1, 2019

Fast process access gets Moortec onto 7nm

Early access to tools for new processes is helping Moortec deliver IP to determine the real-time health of on-chip circuits.
June 16, 2017

DAC 2017 preview: Baum

Start-up Baum is co-located with Verific at DAC 2017 and will demonstrate its soon-to-launch power analysis and modeling software.
Article  |  Topics: Blog Topics, Conferences, Blog - EDA, - Product, RTL  |  Tags: ,   |  Organizations: , ,
June 5, 2017

Mentor builds links for multichip package integration

Mentor, a Siemens business, has formed an alliance with foundries and OSAT providers and launched a flow that brings IC and package design together.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , , , , , ,   |  Organizations: ,

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