Moortec has reworked its thermal-sensing core design to allow for finer-grained use on SoCs being designed for the 5nm node.
Cadence has followed its launched of a parallelizable EM simulator with one that focuses on the thermal behavior of ICs through to multi-PCB assemblies.
Early access to tools for new processes is helping Moortec deliver IP to determine the real-time health of on-chip circuits.
Start-up Baum is co-located with Verific at DAC 2017 and will demonstrate its soon-to-launch power analysis and modeling software.
Mentor, a Siemens business, has formed an alliance with foundries and OSAT providers and launched a flow that brings IC and package design together.
Computational fluid dynamics now addresses more of the simulation activities required for complex systems in a single methodology.
Three Mentor divisions - Embedded, PADS and Tanner EDA - will present their latest innovations during the conference and exhibition in Nuremberg next week.
A new dedicated automotive power tester helps cut simulation errors to just 0.5% with more faithful calibration.
To make a high-efficiency power supply XP Power used heat as an additional design variable with an architecture that turns conventional wisdom over one aspect of component reliability on its head.
Two of the custom designs presented at the 26th Hot Chips in Cupertino exemplified the problems caused by increasing power density and the benefits of looking at heat removal at the system level.
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