Real Intent tool looks for glitches
Real Intent has developed a tool to check design and the potential for circuits to glitch.
reset domain crossing
Real Intent updates reset and clock-domain crossing tools
Real Intent has upgraded its Meridian CDC clock-domain crossing sign-off tool, with support for multimode-aware dynamic models.
Overcome reset domain crossing challenges when using UPF
A DVCon technical paper addresses potential reset domain crossing metastability issues due to UPF instrumentation.
A new methodology addresses the increasing challenge of reset domain crossing
Originally presented at DVCon Europe, a new paper automates complex steps in RDC verification and reduces noise.
A repeatable methodology for modern reset domain crossing issues
Reset domain crossing is another area where rising SoC complexity and IP reuse is causing an increase in reliability and safety challenges.
Catching complex CDC bugs in large SoCs
A look at techniques to trap complex errors caused by signals crossing clock, reset and power domains is the focus of this upcoming webinar
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