EDA

April 6, 2023

Cadence adds AI to PCB design

Cadence Design Systems has expanded its use of machine learning for EDA into PCB design, joining a growing number of suppliers who have decided it is a sector that needs the AI treatment.
Article  |  Topics: Blog - PCB  |  Tags: , , , ,   |  Organizations:
February 28, 2023

Imperas and Synopsys team on RISC-V debug

Imperas is integrating its ImperasDV verification IP with the VCS simulator and Verdi debug tools.
Article  |  Topics: Blog - EDA, IP  |  Tags: , ,   |  Organizations: ,
January 31, 2023

Siemens harnesses machine learning for more comprehensive verification

As first silicon success declines, new software aims to provide a more holistic view of coverage data from multiple sources.
Article  |  Topics: Blog Topics  |  Tags: , , , , ,   |  Organizations:
December 12, 2022

RISC-V gets verification and security IP additions

Ahead of the RISC-V Summit in San Jose, Imperas Software has issued updates to its ImperasDV verification IP for RISC-V verification and Codasip has launched a secure-processor initiative.
Article  |  Topics: Blog - IP  |  Tags: , , ,   |  Organizations: ,
December 1, 2022

Identifying AI opportunities in PCB design

The key to exploiting AI is being clear about where its family of technologies can help to improve and democratize design.
December 1, 2022

Siemens aims to simplify compliance for Linux medical devices

New Quality Package focuses on safety and cybersecurity compliance with EU and US medical device standards.
Article  |  Topics: Blog - Embedded  |  Tags: , , , , , , , ,   |  Organizations:
November 23, 2022

Chipletz pushes packaging design for AI, HPC and immersive use-cases

The Austin-based start-up used Siemens EDA software to deploy a cutting-edge Smart Substrate based on advanced packaging technology.
November 15, 2022

Real Intent tool looks for glitches

Real Intent has developed a tool to check design and the potential for circuits to glitch.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
November 14, 2022

Semiwise brings cryogenic models to SOI

Semiwise has developed transistor models for the GlobalFoundries 22FDX that cover operation at cryogenic temperatures.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations: ,
September 27, 2022

Siemens automates test to handle multi-die 2.5D, 3D and 5.5D architectures

Tessent Multi-die extends the capabilities of the DFT suite in line with new standards intended to enable widespread adoption of interposer and stacked die strategies.
Article  |  Topics: EDA - DFT  |  Tags: , , , , , , , , , ,   |  Organizations:

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