Imperas releases RISC-V coverage library as open source
Imperas Software has published an open-source functional-coverage library for RISC-V cores.
EDA
Open-source EDA grapples with the incentives issue
As the project that funded OpenRoad draws to a close, experts pondered its wider future at the 59th DAC.
‘Shocking’ quality sees vendors organize around RISC-V verification
Three EDA vendors team up to create stronger verification flow for RISC-V processor implementations.
Siemens pushes DRC to the left
Siemens has launched Calibre DRC engines that make it easier to perform useful checks early in the layout process.
Devgan plans for optimization through machine learning
Cadence president expects expanded role for reinforcement learning in tool portfolio and looks for help on AI for verification.
Siemens compiles analog into simulation for faster debug
Siemens EDA has launched a second version of its Symphony simulation environment designed to support quicker debug cycles.
Cadence buys thermal software for data-center digital twins
Thermal-simulation specialist Future Facilities has agreed to be acquired by Cadence Design Systems.
Agile starts to build out analog portfolio with tool-based strategy
Agile Analog's oscillator IP sees the company focus on IP created with its own circuit creation and porting tool.
Fujimura asks EDA to bend towards manufacturability
Aki Fujimura of mask specialist D2S sees curved shapes as key to improving die yield and performance but it needs EDA support.
Fault simulator tackles intrusive hacks
Optima DA has turned its high-throughput fault-simulation technology to the checking protections against aggressive, intrusive hacks.