June 16, 2022
TSMC has certified the Aprisa place-and-route software from Siemens Digital Industries Software for the N5 and N4 process technologies.
June 13, 2022
Real Intent has upgraded its Meridian CDC clock-domain crossing sign-off tool, with support for multimode-aware dynamic models.
June 10, 2022
Cadence has used machine-learning techniques originally developed for its Cerebrus tool to build software that can speed up multiphysics analysis.
May 25, 2022
Siemens has expanded its Nucleus ReadyStart program to the RISC-V architecture.
May 24, 2022
Synopsys and Analog Devices have agreed to provide model libraries for the chipmaker's DC/DC ICs and power regulators that work with the Saber simulation tool.
May 12, 2022
Real Intent has extended the fault coverage of its Meridian DFT static sign-off tool with improvements to the reporting of issues and the ability to track down root causes.
April 29, 2022
Variable lifetimes are an apparently basic but also tricky feature within the verification language.
April 28, 2022
Chiplets will need models to guarantee heterogenous SiP implementation. A cross-industry working group describes its progress so far.
April 27, 2022
The NVMe 2.0 specification has introduced two namespace options that boost SSD performance while optimizing storage life.
March 13, 2022
A new white paper offers useful tips and techniques for PDN analysis and performance optimization in designs such as those using DDR4.