February 28, 2023
Imperas is integrating its ImperasDV verification IP with the VCS simulator and Verdi debug tools.
January 31, 2023
As first silicon success declines, new software aims to provide a more holistic view of coverage data from multiple sources.
December 12, 2022
Ahead of the RISC-V Summit in San Jose, Imperas Software has issued updates to its ImperasDV verification IP for RISC-V verification and Codasip has launched a secure-processor initiative.
December 1, 2022
The key to exploiting AI is being clear about where its family of technologies can help to improve and democratize design.
December 1, 2022
New Quality Package focuses on safety and cybersecurity compliance with EU and US medical device standards.
November 23, 2022
The Austin-based start-up used Siemens EDA software to deploy a cutting-edge Smart Substrate based on advanced packaging technology.
November 15, 2022
Real Intent has developed a tool to check design and the potential for circuits to glitch.
November 14, 2022
Semiwise has developed transistor models for the GlobalFoundries 22FDX that cover operation at cryogenic temperatures.
September 27, 2022
Tessent Multi-die extends the capabilities of the DFT suite in line with new standards intended to enable widespread adoption of interposer and stacked die strategies.
September 21, 2022
Agile Analog has launched its own digital standard cell library, designed to be used in the control circuits for analog blocks that form the IP company’s main offering.