EDA

August 8, 2023

Catch up with the state-of-the-art in ‘shift left’

Just how much of the flow has already has 'shift left' benefit and what is fueling further progress.
July 25, 2023

Verification Futures heads to the US in September

Tessolve is bringing its Verification Futures conference to the US with an event scheduled for mid-September.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations: , , ,
July 14, 2023

Cadence mixes know-how and AI to bridge RTL gap

The Joules RTL Design Studio aims to make coding more aware of aware of physical issues before and after hand-off for implementation.
Article  |  Topics: Blog Topics, Physical design, RTL, Verification  |  Tags: , , , , ,   |  Organizations: , , ,
July 11, 2023

AI’s possible roles in verification covered at VF2023

The recent Verification Futures Europe conference looked at what AI, from decision trees to foundation models, could do to speed up RTL checks.
July 10, 2023

Calibre ‘shifts left’ into place and route

Calibre Design Enhancer moves physical verification checks and automated DRC-clean via and cell insertion into P&R
Article  |  Topics: DFM, Digital/analog implementation, Blog - EDA, - Verification  |  Tags: , , ,   |  Organizations: ,
July 10, 2023

Siemens fuels custom IC flows with artificial intelligence

Three fast developing AI techniques underpin the efficiencies in the new Solido custom design and verification platform.
June 20, 2023

Maximize manufacturing execution with HPC

Single-device tracking in the chiplet and multi-chip age needs a boost to deliver accuracy and greater production efficiency.
June 14, 2023

Siemens pulls supply-chain data into Xpedition

Siemens is integrating the Supplyframe platform with the Xpedition PCB-design software to give engineers better visibility into component availability.
Article  |  Topics: Blog - PCB  |  Tags: , ,   |  Organizations:
June 1, 2023

Does 2.5DIC call for IC design tools for the packaging?

Siemens has published a white paper that examines whether package designers need to adopt IC tools and design styles in the move from organic packages to 2.5DIC packages.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , , , ,   |  Organizations:
May 30, 2023

Charting the path for machine learning in functional verification

A comprehensive review of ML's potential and its current use identifies challenges ahead.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations:

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