Sigasi has launched a software kit to provide inhouse tools builders and EDA vendors with a way to build in code-editing features.
Siemens has agreed to acquire UK-based debug and on-chip instrumentation startup UltraSoC and will fold the operation into Mentor’s Tessent test-software product line.
The combination of Embedded Linux and Azure is supported by services and technologies that speed the delivery and deployment of MCU-based projects.
Even experienced IC design houses must adopt innovative and emerging strategies to meet functional safety and other demands of ISO 26262 for automotive systems.
Capital has been grown from a wire harness suite to a full electrical/electronic platform with integration for digital twin strategies.
AMD worked with Microsoft and Azure to cut DRC runtimes and control memory usage for a 7nm cloud-based design.
Real Intent has launched a DFT tool intended to relax the bottlenecks that occur as an SoC project moves into its final phase ahead of tapeout.
A technical paper originally presented at DVCon USA 2020 simplifies the creation of coverage strategies using manual, automated and verification IP components.
A white paper details the parasitic extraction technology needed to help design high-performance RF SoCs.
Live and on-demand videos as well as You Tube 'tips and techniques' clips form part of a wide 'work at home' support package from Mentor.
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