EDA

October 8, 2012

Synopsys buys EVE and the death of dogma

The EDA giant fills out its prototyping and verification line-up with a long-mooted acquisition, and is set to become the first of the 'big three' to offer an in-house soup-to-nuts flow.
October 5, 2012

IEF: Process kits for processes that don’t yet exist

Designers should plan ahead for future process changes as conventional silicon CMOS runs out of steam, IMEC's Rudy Lauwereins told delegates at the International Electronics Forum in Bratislava this week.
Article  |  Tags: , , ,   |  Organizations:
October 4, 2012

IEF: “Industry will have to cooperate”

The semiconductor industry is reaching a crunch point at which companies that form it have to work together much more closely, says Malcolm Penn of Future Horizons.
Article  |  Tags: , ,   |  Organizations: ,
October 4, 2012

IEF: Achronix plans embedded FPGA push

Achronix plans to use the FPGA fabric that it has developed for standalone products to be fabbed through Intel as the springboard for an embedded-FPGA offering.
Article  |  Tags: , , , ,   |  Organizations: , ,
October 3, 2012

SAME: Memory-saving standard to expand

The scope of the Low-Latency Interface (LLI) developed by the MIPI Alliance is expanding as it heads towards version 2 – increasing the ways in which a single DRAM array can be shared between SoCs in a mobile phone.
Article  |  Tags: , , , ,   |  Organizations: ,
September 26, 2012

Cadence updates Allegro and Orcad

Cadence Design Systems has updated both of its printed circuit board (PCB) tools – Allegro and Orcad – to improve their handling of design constraints, multiuser design and deal with embedded components and mechanical CAD tools.
September 6, 2012

Getting ready for 20nm

Tackling the three key challenges of 20nm processes: design complexity; the physics of lithography; and economics.
Article  |  Tags: , , ,
August 23, 2012

Verification challenges require surgical precision

The verification challenge is best addressed by a combination of highly targeted tools, according to Pranav Ashar, CTO of Real Intent.
August 6, 2012

Aart de Geus on the changing face of EDA

The president and co-CEO of Synopsys provides his take on the mounting influence of software and physical effects in the creation of SoCs.
Article  |  Tags: , , ,   |  Organizations: , ,
July 26, 2012

Xilinx extends Vivado availability

Xilinx says it has made the first public release of its Vivado Design Suite – the reworked design environment for its sub-40mn programmable-logic devices that is based more heavily on concepts from the custom-IC world than its existing ISE toolset.
Article  |  Tags:   |  Organizations:

PLATINUM SPONSORS

Synopsys Cadence Design Systems Siemens EDA
View All Sponsors