Companies need to collaborate with partners, vendors, and the rest of the supply chain if they are to achieve critical mass, Aart de Geus tells Synopsys user meeting.
At the SNUG event this week, Synopsys is taking the wraps off its plans to support 3DIC, with updates to tools for physical design and verification.
This looks more like 2.5D silicon interposer-based technology to us, though it is a major and necessary advance
This page brings together all of our coverage from Design Automation and Test in Europe 2012 in Dresden, Germany.
Aldec has updated its Riviera Pro tool to provide more support for OS-VVM, the recently launched verification methodology for VHDL
Blue Pearl Software has extended its reach into the world of field-programmable gate array (FPGA) design and verification with a project that has culminated in a tighter integration between its timing analysis tools and the Synopsys Synplify Pro tool.
Old processes don't necessarily equate to old tools, panelists argued at DATE, especially when a lot of future work will be done on more-than-Moore, 3DIC technologies.
The CTO of one European design house wants better acceleration features from analog design tools, not automation that overrides their judgement.
Wearable healthcare monitoring systems are a fast growing market, and could surge when clearer device approval regimes are introduced globally. Despite that brake on growth, companies and research organizations continue to innovate in anticipation. The subject of the first TDF Circuits, a graphics-led series looking at innovative implementations, is a subset of the Bio-potential Acquisition […]
ARM has found that in its work on processor design looking at the system-design and process issues as well as the way software interacts with the machine can yield surprising results.