EDA

Guest blogger Jeff Wilson discusses some of the subtleties involved in the effective use of dummy fill in deep sub-micron IC designs.

Cutting the cabling to simplify the emulation process.

SpringSoft is trying a different approach to constraint-based design in a bid to improve the automation of custom and mixed-signal design, particularly on advanced process nodes.

Mentor Graphics' CEO Wally Rhines picked out the trends he says can boost design productivity and drive growth for tools vendors at the company's Silicon Valley User2User conference

The specialist AMS foundry Triad Semiconductor has married its ViaASIC drag and drop libraries to Mentor Graphics' SystemVision design environment.

Companies need to collaborate with partners, vendors, and the rest of the supply chain if they are to achieve critical mass, Aart de Geus tells Synopsys user meeting.

At the SNUG event this week, Synopsys is taking the wraps off its plans to support 3DIC, with updates to tools for physical design and verification.

This looks more like 2.5D silicon interposer-based technology to us, though it is a major and necessary advance

This page brings together all of our coverage from Design Automation and Test in Europe 2012 in Dresden, Germany.

Aldec has updated its Riviera Pro tool to provide more support for OS-VVM, the recently launched verification methodology for VHDL