March 15, 2012
Blue Pearl Software has extended its reach into the world of field-programmable gate array (FPGA) design and verification with a project that has culminated in a tighter integration between its timing analysis tools and the Synopsys Synplify Pro tool.
March 14, 2012
Old processes don't necessarily equate to old tools, panelists argued at DATE, especially when a lot of future work will be done on more-than-Moore, 3DIC technologies.
March 13, 2012
The CTO of one European design house wants better acceleration features from analog design tools, not automation that overrides their judgement.
March 13, 2012
Wearable healthcare monitoring systems are a fast growing market, and could surge when clearer device approval regimes are introduced globally. Despite that brake on growth, companies and research organizations continue to innovate in anticipation. The subject of the first TDF Circuits, a graphics-led series looking at innovative implementations, is a subset of the Bio-potential Acquisition […]
March 13, 2012
ARM has found that in its work on processor design looking at the system-design and process issues as well as the way software interacts with the machine can yield surprising results.
March 8, 2012
The International Symposium on Quality Electronic Design (ISQED) enters its 13th edition later this month, running March 19-21 at Techmart in Santa Clara. Although ISQED traditionally concentrated on tools and IP blocks, its agenda has broadened as the industry has migrated to SoCs and full electronic systems where process and manufacturing interactions have come to […]
February 29, 2012
Our first email newsletter previews next month's Common Platform Technology Forum 2012 and features exclusive interviews with senior staff at Samsung, ARM and Cadence Design Systems.
February 27, 2012
In the world of power semiconductors, not many companies try to go fabless. The tradeoffs between design and process offer many more options for system-level design, argued Infineon's Reinhard Ploss at the ISS Europe conference.
February 27, 2012
Synopsys has rolled out its SystemVerilog-based verification IP portfolio for a bunch of interconnect standards – and built in support for all the three major verification methodologies.
February 20, 2012
The CDN Live series of Cadence Design Systems user conferences begins with its Silicon Valley edition at San Jose's Doubletree Hotel on March 12-13.
