Glass may be the high frequency interposer option given silicon concerns about power and noise. TSMC adds another pathfinder to its 3D arsenal.
TSMC stays the course with new co-CEOs as Morris Chang retains executive leadership for now while finFET, 3D and other new technologies settle in.
Research projects to verify methodologies, address third-party integration challenges and add a low-cost interposer-like technology to the 3D-IC family make their mark.
Packed one-day event has speakers from Cadence, TSMC, Samsung, Amkor, Advantest and more providing a senior level view of making 3D-IC a reality. Registration closes soon.
TSMC 16nm finFET process and efforts to increase p-finFET mobility using germanium to be detailed at December's International Electron Devices Meeting.
Altera has disclosed a number of the features that will make it into the top end of its upcoming 'Generation 10' family of FPGAs.
The arrival of the finFET brings with it simulation and physical restrictions that might lead teams to resort to layout automation to get the job done.
Xilinx and TSMC are forming a single engineering team to accelerate development of a family of finFET-based field programmable gate arrays (FPGAs).
A look at what you can learn about design for manufacturability and yield at this year's Design Automation Conference
Dr Chenming Hu joins Mentor CEO Wally Rhines and Xilinx SVP Victor Peng to keynote free day-long User2User in San Jose on April 25th, capping a full technical program.
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