Pulsic has adopted the freemium approach with a tool that gives designers of analog circuits previews of how they will be implemented on-chip.
Early access to tools for new processes is helping Moortec deliver IP to determine the real-time health of on-chip circuits.
Movellus has launched the first of a series of IP-creation tools with one that will build all-digital PLLs and integrate them into a design.
Cadence Design Systems and The Mathworks have implemented the first phase of an integration program to link tools such as Virtuoso ADE to Matlab.
Cadence is creating a flow that the company believes will make it possible to bring greater predictability to photonics design.
Startup launches an analog-circuit migration and optimization tool that uses less simulation time than traditional approaches the company claims.
Cadence Design Systems has made additions to its Virtuoso mixed-signal design environment intended to improve design for manufacture and the ability of teams to create and test safety-critical systems.
DVCon Europe has published the technical program for its upcoming November conference in Munich, Germany.
Cadence Design Systems has launched an analog simulation tool designed to speed up the characterization of mixed-signal macros that can then be used to create the Liberty representations needed for full-chip signoff.
Pulsic has developed an automated mixed-signal layout tool that uses multiple generated variants to let designers pick the best implementation.
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