design technology co-optimization


April 11, 2024

Refining DTCO to bridge data walls in system design

DTCO (design technology co-optimization) looks to address systemic verification challenges but the process still needs to be extended.
June 8, 2015

DTCO tool aims to squeeze more out of older processes

Gold Standard Simulations (GSS) has launched a tool intended to help fabless chipmakers squeeze more out of existing processes rather than accept the risk and expense of moving to more advanced, finFET-based processes.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations:
June 3, 2014

Remember 20nm? Qualcomm does

Qualcomm will present at VLSI Technology Symposium 2014 a version of TSMC's 20nm technology that uses design and process tweaks to reduce the number of double-patterned layers.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations: ,

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