Cadence Design Systems

June 8, 2015

Formal integration enhances bug-hunting for Cadence

Following the acquisition of Jasper Design Automation last year, Cadence Design Systems is widening the target base of applications for formal verification, covering tasks from bug hunting through accelerated simulation to 'superlinting'.
June 5, 2015

DAC 2015: Cadence Design Systems at the Design Automation Conference

An overview of Cadence's activities at DAC and a last-minute call-out if you want to register for its breakfast and luncheon sessions.
Article  |  Topics: Conferences, Blog - EDA, Embedded, - General, Blog - IP, PCB  |  Tags:   |  Organizations:
June 3, 2015

Cadence deploys parallel strategy for faster synthesis

RTL synthesis has joined the array of tools developed by Cadence Design Systems that employ distributed processing, with the aim of exploring more ways of creating area- and power-efficient logic blocks.
May 24, 2015

Cadence updates Allegro with PCB production and routing tools

Cadence has launched the 16.6 release of its Allegro PCB-design portfolio, adding modules for manufacturing documentation and design-rule preparation aids.
Article  |  Topics: Blog - PCB  |  Tags: , , , , ,   |  Organizations:
May 18, 2015

Vehicle ethernet adds to IP virtual reference kits for board design

Automotive ethernet is the latest virtual reference design platform to be added to the family of models developed by Cadence to support its physical-layer IP cores.
Article  |  Topics: Blog - IP, PCB  |  Tags: , , , , , ,   |  Organizations:
May 11, 2015

Formal verification conference offers ARM, Broadcom, Imagination insights, online access

Conference addresses formal verification techniques at levels to suit beginners through to experts
May 5, 2015

Xilinx updates Vivado with CDC, faster verification, third-party flows, and lab edition

New version of Vivado adds verification features and speed, extends Zynq support
Article  |  Topics: Product  |  Tags: ,   |  Organizations: , , , ,
April 29, 2015

Automotive integration led by cabling concerns, says NXP

Cabling and its weight are helping to drive integration and a shift towards wireless communication within cars, says NXP's automotive CTO.
April 28, 2015

Cadence upgrades debug for system-level era

Cadence Design Systems has launched a debug tool designed to improve the speed of bug hunting in SystemVerilog but which the company expects to grow into analog and post-silicon work.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , , ,   |  Organizations:
April 22, 2015

Fusion core targets voice-activated devices

Cadence has launched a processor core aimed at ‘always on’ signal-processing applications such as voice detection and recognition for wearables.
Article  |  Topics: Blog - IP  |  Tags: , , , ,   |  Organizations:

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