Cadence Design Systems

December 11, 2014

Use-cases drive high-level verification tool

Cadence has released a tool intended to ease the creation of scenario-driven tests to better exercise complex IP and SoC designs.
October 28, 2014

Cadence tool automates library creation of analog macros

Cadence Design Systems has launched an analog simulation tool designed to speed up the characterization of mixed-signal macros that can then be used to create the Liberty representations needed for full-chip signoff.
October 22, 2014

Cadence targets ISO 26262 with verification support

Cadence Design Systems has built a verification environment around its vManager software for ICs and systems that need to conform to the ISO 26262 safety standard.
October 8, 2014

Still time to get to European design and verification conference

DVCon Europe brings design and verification insights to Munich next week.
October 4, 2014

Carbon introduces exchange for building and stressing virtual prototypes

Carbon Design Systems has introduced a web portal to streamline the process of finding the most appropriate executable models for a system-level virtual prototype.
October 1, 2014

The changes demanded by IoT design

Does the internet of things (IoT) require a change in design techniques? A number of people involved in the EDA industry reckon it does.
September 29, 2014

TSMC adds sub-micron low-leakage processes

TSMC has launched three processes the foundry is aiming at internet-of-things (IoT) and wearable-device designs, providing lower-leakage versions of its 55nm, 40nm and 28nm processes.
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September 19, 2014

Cisco to absorb smart-memory IP

Cisco has decided to buy memory-controller specialist Memoir Systems and absorb the technology into its Insieme business unit, which specializes in data-center switch technologies, a move that underlines the issues facing small IP suppliers and their customers.
September 17, 2014

New flows needed for the ‘insects of the SoC world’

Chris Rowen, CTO of the IP group at Cadence Design Systems, expects the internet of things (IoT) to cause a split in approaches to SoC design, one of a set of predictions about the nascent market.
Article  |  Topics: Blog - EDA, Embedded, IP  |  Tags: , , , , ,   |  Organizations:
September 2, 2014

IoT mixed signal design: keep everything in the green

ARM and Cadence have teamed up to show how system-level and implementation-level representations of a mixed-signal design can be linked together and kept in sync as the project progresses.
Article  |  Topics: Blog - EDA, Embedded, IP  |  Tags: , , ,   |  Organizations: ,

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