Cadence Design Systems

Cadence has released a tool intended to ease the creation of scenario-driven tests to better exercise complex IP and SoC designs.

Cadence Design Systems has launched an analog simulation tool designed to speed up the characterization of mixed-signal macros that can then be used to create the Liberty representations needed for full-chip signoff.

Cadence Design Systems has built a verification environment around its vManager software for ICs and systems that need to conform to the ISO 26262 safety standard.

DVCon Europe brings design and verification insights to Munich next week.

Carbon Design Systems has introduced a web portal to streamline the process of finding the most appropriate executable models for a system-level virtual prototype.

Does the internet of things (IoT) require a change in design techniques? A number of people involved in the EDA industry reckon it does.

TSMC has launched three processes the foundry is aiming at internet-of-things (IoT) and wearable-device designs, providing lower-leakage versions of its 55nm, 40nm and 28nm processes.

Cisco has decided to buy memory-controller specialist Memoir Systems and absorb the technology into its Insieme business unit, which specializes in data-center switch technologies, a move that underlines the issues facing small IP suppliers and their customers.

Chris Rowen, CTO of the IP group at Cadence Design Systems, expects the internet of things (IoT) to cause a split in approaches to SoC design, one of a set of predictions about the nascent market.

ARM and Cadence have teamed up to show how system-level and implementation-level representations of a mixed-signal design can be linked together and kept in sync as the project progresses.