Formal verification conference offers ARM, Broadcom, Imagination insights, online access

By Luke Collins |  No Comments  |  Posted: May 11, 2015
Topics/Categories: Conferences, Verification  |  Tags: , , ,  | Organizations: , , , , , ,

Representatives from ARM, Imagination  Technologies, Broadcom, the University of Southampton and leading EDA vendors will discuss the use of formal methods in verification at a conference being held in the UK and on line next week.

Formal Verification 2015 is the third annual conference on the topic organised by Test and Verification  Solutions (TVS).  It is being held in Reading on Thursday 21 May.

Mike Bartley, CEO of TVS, says the program has been structured to suit all levels of experience with formal verification techniques.

Professor Ashish Darbari, leader of the advanced verification methodology group at Imagination Technologies will keynote on The Ten Myths About Formal, exploring some widespread misunderstandings about what formal techniques can and cannot do.

Alex Orr, principal engineer, IC design, at Broadcom, will present on My first 100 days in formal-land, discussing his perspective as a new user, the differences between a dynamic and static mindset, and his experience of adopting new techniques.

Mark Handover, an applications engineer at Mentor Graphics, will take his audience Back to Basics: Doing Formal the Right Way, focusing on how to write assertions the right way, run formal the right way and look at coverage in the right way.

John Colley of the University of Southampton will discuss Formal, Model-based Development and Verification of Hardware, Software and Cyber-Physical Systems, looking at Event-B, a proof-based modelling language and methodology that enables the systematic development of specifications using a formal notion of refinement, which is in use at more than 20 industrial organisations.

In the afternoon,  Laurent Arditi, principal engineer, ARM, will present on Formal Weapons for Microprocessor Verification, talking about the way that ARM is using formal techniques to
to hunt for many classes of bugs, the flows it uses to do so, and some best practices and tricks it applies to increase the efficiency of formal verification and make it usable by the masses.

Raik Brinkmann, president and CEO of OneSpin Solutions, will discuss Extending the Formal-based Ecosystem – Refreshing the parts other formal tools can’t reach, reflecting on how and where  formal techniques are applied at the moment, and ways in which this could change in future. Brinkmann is also expected to announce an initiative to address the way formal technology is delivered at the moment.

Iain Singleton, engineer, advanced verification methodology group at Imagination Technologies, will argue It’s all in the Model: Verifying Complex Arbitration Schemes using Formal, talking about the challenges of verifying complex arbitration schemes with several masters and many requestors. Singleton will present an abstract formal model that uses a single assertion to exhaustively verify a range of arbiters, some with up to 256 requestors.

Doug Fisher, senior staff application consultant at Synopsys, will present a talk on Alternative formal techniques to increase verification productivity, focusing on applying transactional equivalence checking, sequential equivalence checking and formal debug techniques to the practical challenges of design bring-up, rapid verification of iterative design refinement, root cause analysis and verification sign-off.

The day will also includes presentations from Cadence and a welcome from Bartley, as well as networking sessions throughout and a panel discussion at the end.

The event is free to attend in person in Reading, UK, or online, but you need to book here.

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