DAC 2015: Cadence Design Systems at the Design Automation Conference

By Paul Dempsey |  No Comments  |  Posted: June 5, 2015
Topics/Categories: Conferences, Blog - EDA, Embedded, - General, Blog - IP, PCB  |  Tags:  | Organizations:

Cadence Design Systems is closing online registration for many of its events at this year’s Design Automation Conference today (June 5), specifically its breakfast and luncheon events during the conference. Those are listed below, but the company also has a wide range of ‘open’ events and is offering users the chance to link with various company experts.

Fireside chat with Lip-Bu Tan and more

Cadence’s president and CEO, Lip-Bu Tan, takes his turn in DAC’s CEO hot seat on Tuesday (June 9, 11.30am). As with all the Fireside Chats, it will take place in the DAC Pavilion (Booth #311).

He is just one of a large number of Cadence speakers at the conference, far too many to list here. But the company has provided a guide to whom you can find, where and when. In addition, a plethora of users and partners will also be presenting about their experiences at the Cadence Theater in the company’s DAC booth (#3515).

A full list of supporting technical sessions and demos can also be found here.

Cadence Expert Bar

Got a burning and very specific question. Cadence has set up its own Expert Bar where you can drop by and quiz one of its staff about your specific problem.

Different topics will be covered at different times during the show, so check the schedule beforehand. You can find the latest version of that here.

Last chance saloon

Here’s a quick recap of the events for which registration closes today (Friday June 5).

Cadence is offering three luncheons and one breakfast session. All are moderated by Brian Fuller and feature a wide range of high-level speakers

Monday, June 8

The Monday luncheon (12.00-1.30pm) will consider How to make next-generation verification smarter, with contributions from AMD, Breker Verification Systems and Qualcomm as well as Cadence itself.

Tuesday, June 9

On Tuesday, a breakfast session (7.30-9.00am) will consider one of the hottest topics in the business, Crossing the Great Divide: How to safely navigate the move from 28nm to 16FF+. The speakers here include many of the companies that have already been worked at the coal face, such as ARM, Broadcom, Freescale Semiconductor, HiSilicon and TSMC.

This will be followed by a luncheon (12.00-1.30pm), The future of digital is here. This will focus on advanced designs combining synthesis, implementation and signoff flows and tools. As well as Cadence, there will be speakers from ARM, MaxLinear, Qualcomm, Soft Machies and TSMC.

Wednesday, June 10

Wednesday’s luncheon will address Methodology and metrics for analog/mixed-signal verification: madness or marriage? The debate still rages over just how many digital techniques can be brought into AMS to boost productivity. Speakers from Maxim Integrated Products, NXP Semiconductors and Semtech, along with Cadence, will try to find the right balance.

So, to check for last-minute availability and learn more about any of these sessions, click here. Probably best if you do that right now.

…oh, and some bad news

The Denali party is full. Lefty O’Doul’s, then!

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