Fast instruction simulator expands to Arm
MachineWare has expanded its portfolio of high-speed instruction-set simulators to the Arm Cortex-A and -M architectures.
Archives
Vertical integration expands at IEDM
Vertical integration is one of the major focus areas at the upcoming IEDM conference, both in terms of transistors and the multiple channels that will go into them.
Shift left: what it does and how to make it happen
Get to know more on the specific benefits of shift left and how to achieve easy adoption.
AI aims to cut CAD-model generation time
Ultra Librarian has developed an AI-driven CAD modeling engine that should slash the the time it takes to build component and subsystem models for PCB layout and system design.
Cadence gives OrCAD access to cloud AI placement
Cadence has given its new release of OrCAD access to the cloud-based AI placer designed for its Allegro PCB-layout software.
HPC and AI provide keynote focus at DVCon Europe
DVCon Europe has announced its two keynote presentations, focusing on energy-efficient high-performance computing and machine learning.
Accellera group formed to work on federated simulation
Accellera has formed a working group to look at the possibility of creating a standard for federated simulation.
Catch up with the state-of-the-art in ‘shift left’
Just how much of the flow has already has 'shift left' benefit and what is fueling further progress.
Verification Futures heads to the US in September
Tessolve is bringing its Verification Futures conference to the US with an event scheduled for mid-September.
Backside power shows promise but more complex manufacturing
Backside power delivery could lead to improvements in chip density and more straightforward place-and-route phases according to work presented at this year’s VLSI Symposium.