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October 25, 2012
Using verification IP to master AMBA and wider protocol proliferation
How and why Huawei's Hisilicon and DSP specialist CEVA tapped Cadence to implement ARM protocols.
Article | Topics:
Blog Topics
,
Commentary
,
Blog - EDA
,
- Standards
,
Verification
| Tags:
AMBA
,
verification IP
| Organizations:
Arm
,
Cadence Design Systems
,
CEVA
,
Hisilicon
October 24, 2012
Board-level DRC tool to find signal-integrity problems
Mentor Graphics has added to its HyperLynx suite a tool that uses design-rule check (DRC) techniques rather than simulation to look for potential signal-integrity problems.
Article | Topics:
Blog - PCB
| Tags:
PCB layout
,
power integrity
,
signal integrity
| Organizations:
Mentor Graphics
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