Author Archives: TDF Staff

Read some edited highlights from the most successful companies in Mentor's 2017 Technology Leadership Awards.

Two-year-old design house make IP choice to use Synopsys DesignWare to build an enterprise SSD controller from scratch.

ST has tweaked its standard HLS flow for ISPs to meet the requirements of ISO 26262

UPF power state tables have become unwieldy due to rapid growth in LP design. The new construct, 'add_power_state' enables better verification flows.

Will discuss how automotive OEMs and chip designers can use AI, deep learning, and convolutional neural networks to achieve better performance than traditional techniques.

Synopsys' line-up at next week's ARM TechCon includes joint presentations with Huawei and Nvidia.

Mentor will present seven papers during the ARMTech Con and a dedicated session, and exhibit at Booth #606.

Automotive test has never been easy. Safety made sure of that. But the move to autonomous vehicles is making it more challenging still.

Plunify will demonstrate its new Kabuto tool that recommends RTL fixes for FPGA designs at the Design Automation Conference.

Start-up Baum is co-located with Verific at DAC 2017 and will demonstrate its soon-to-launch power analysis and modeling software.