Author Archives: TDF Staff

March 9, 2018

DATE 2018 preview: Mentor

DATE highlights for Mentor include a 90-minute workshop on achieving functional safety for autonomous driving.
February 20, 2018

DVCon US 2018 preview: OneSpin Solutions

The formal verification specialist will leverage its recent, successful certification by TÜV SÜD for functional safety solutions.
February 16, 2018

SPIE Advanced Lithography 2018 preview: Mentor

Innovation and advances in EUV and OPC lead Mentor's offerings at SPIE in San Jose later this month.
Article  |  Topics: Conferences, Design to Silicon  |  Tags: , , , , , , ,   |  Organizations: ,
February 15, 2018

DVCon US 2018 preview: Oski Technology

The formal verification specialist will be discussing its own experiences and has partnered with users for presentations at DVCon US.
Article  |  Topics: Conferences, Blog - EDA, - Verification  |  Tags: ,   |  Organizations: ,
February 14, 2018

DVCon US 2018 preview: Breker Verification Systems

Breker's work towards the portable stimulus roll-out will lead much of its offering later this month in San Jose.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , ,   |  Organizations: ,
February 12, 2018

DVCon US 2018 preview: Mentor

The Siemens subsidiary is involved with a wide range of tutorials, technical papers and more at this month's San Jose conference.
January 23, 2018

ARM DesignStart case study demonstrates scheme’s ease-of-use

ARM and Mentor describe a proof-of-concept project using free tools and IP to combine AMS and digital.
January 23, 2018

Triage without tears: improving debug’s most human challenge

Struggling with how to make your debug triage process more efficient? A new checklist could help focus your efforts.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , ,   |  Organizations:
January 18, 2018

Demand for better video, audio prompts HDMI 2.1 IP push

IP provides key building blocks for building better video and audio playback devices using HDMI 2.1
Article  |  Topics: Blog - IP, - Product  |  Tags: , , ,   |  Organizations:
January 5, 2018

Synopsys integrates Helic’s EM tools to tighten margins on mixed-signal, analogue and RF SoCs

Better integration of EM modeling and analysis tools with Synopsys' Custom Compiler should enable tighter design margins
Article  |  Topics: Blog - EDA, - Product  |  Tags: , ,   |  Organizations: ,