Arm TechCon 2017 kicks off a week today on Tuesday, October 24 at the Santa Clara Convention Center and runs until Thursday, October 26.
Mentor, A Siemens business, will be exhibiting on Booth #606, with a focus on four areas: Functional Verification and Emulation (Questa, Veloce and Vista); Tanner EDA (for AMS, MEMS and Custom SoC with a focus on Cortex M0 implementations); High-level Synthesis and Low Power Optimization (Catapult); and Embedded Systems (Mentor Embedded).
Mentor will also present two papers as part of Arm TechCon’s main technical program and a full-day of five dedicated Mentor presentations.
Arm TechCon technical program
Jeff Miller of Tanner EDA will present a talk entitled Solving the Challenges: IoT edge design (11:30AM-12:20PM, Thursday, October 26, Ballroom F).
Catherine Moore of the Mentor Embedded Division will discuss Arm LLVM for the Raspberry Pi (2:30PM-3:20PM, Thursday, October 26, Ballroom H).
Mentor sessions at Arm TechCon
Mentor’s day of technical presentations takes place on Wednesday, October 25, in Mission Ballroom M3.
Optimizing Power in the Ever Changing IoT Landscape by Jay Natarajan and Jerome Bortolami, High-Level Synthesis Division
Efficient Register Transfer Level (RTL) Fault Analysis for Automotive Designs by Joe Hupcey and Ping Yeung, Design Verification & Test Division
System Architecture Considerations for Management and Security of IoT-enabled Embedded Designs by Arvind Raghuraman and Dan Driscoll, Mentor Embedded Systems Division
Using Emulation for Meaningful Power Analysis by Guillaume Boillet, Mentor Emulation Division
Surviving the Flood of Data – Making Sense of IoT, Machine Learning and Anomaly Detection by Rob Bates, Mentor Embedded Systems Division, and Ray Richardson, Simularity
The Mentor booth will feature a number of presentations in its own theater. More details will be available on site.
Online registration for Arm TechCon 2017 was still open at time of going to press.