Tech Design Forum
Briefing
logic BIST
logic BIST
July 7, 2017
How automotive test is evolving for the age of autonomous vehicles
Automotive test has never been easy. Safety made sure of that. But the move to autonomous vehicles is making it more challenging still.
Article | Topics:
Blog - EDA
,
- Tested Component to System
| Tags:
analog fault simulation
,
automotive
,
autonomous vehicles
,
cell characterization
,
dppm
,
IJTAG
,
ISO26262
,
layout characterization
,
logic BIST
,
memory BIST
,
Tessent
| Organizations:
ON Semiconductor
,
Siemens EDA
March 9, 2016
IP implementation variety drives latest partnerships
Mentor Graphics' recent deal with ARM illustrates how proliferation in design is influencing deals between tool and IP vendors.
Article | Topics:
Digital/analog implementation
,
Blog - EDA
,
IP
,
- Product
,
Tested Component to System
,
Verification
| Tags:
Artisan
,
CoreLink
,
cortex
,
CPU
,
emulation
,
GPU
,
logic BIST
,
Mali
,
memory BIST
,
Olympus-SoC
,
physical IP
,
physical synthesis
,
place and route
,
Questa
,
simulation
,
Tessent
,
veloce
,
verification
| Organizations:
Arm
,
Mentor Graphics
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