CNN


October 4, 2019

Master the design and verification of next gen transport: Part Three – functional safety

The third part of this series takes the original CNN demonstrator through a full ISO 26262 type functional safety workflow
September 18, 2019

Ceva shares weights for lower DNN overhead

Ceva has employed a more extensive form of weight compression in its latest generation of DNN processor cores.
Article  |  Topics: Blog - IP  |  Tags: , , ,   |  Organizations:
September 18, 2019

Synopsys claims 35TOPS performance from new family of embedded vision cores

IP core focuses on avodiing memory access bottlenecks during processing of complex machine-learning and artificial-intelligence algortihms.
Article  |  Topics: Blog - IP, - Product  |  Tags: , , ,   |  Organizations:
September 19, 2018

Cadence culls zeroes for faster neural throughput

Cadence has launched an AI processor using an designed to take advantage of the sparse structure of typical deep neural networks.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , ,   |  Organizations:
May 17, 2018

Synopsys offers ASIL D ready embedded vision IP for ADAS and autonomous vehicle SoCs

Synopsys has extended its range of semiconductor IP for use in advanced driver assistance (ADAS) and autonomous vehicle SoCs with the launch of embedded vision processor blocks that have been given safety enhancements.
Article  |  Topics: Product  |  Tags: , , ,   |  Organizations:
November 28, 2017

Webinar outlines the impact of AI on autonomous vehicles

Will discuss how automotive OEMs and chip designers can use AI, deep learning, and convolutional neural networks to achieve better performance than traditional techniques.
Article  |  Topics: Conferences, Industry Blogs, Market Research  |  Tags: , , ,   |  Organizations:

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors