physical verification


January 21, 2019

Synopsys gets big-chip signoff boost from Innovium

Data-centre networking chip goes through full-chip design rule checking and layout-versus-schematic signoff on TSMC's 16nm finFET process in a day.
January 21, 2019

Video series details the physical verification process

Physical verification challenge of large SoCs on leading-edge processes detailed in video series
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , ,   |  Organizations:
June 20, 2018

DAC 2018 preview: Mentor

Mentor will be present throughout the DAC program but with a particular focus on machine learning, artificial intelligence and automotive challenges.
June 19, 2018

Mentor targets DRC efficiencies for place-and-route with Calibre RealTime Digital

Early users of the new P&R integrated physical verification tool say time-to-sign-off was cut by 40% and above.
Article  |  Topics: Verification  |  Tags: , , , , ,   |  Organizations:

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