simulation

October 19, 2015

Mentor targets next-gen Ethernet with emulation

Vendor adds verification support for 25G, 50G and 100G Ethernet through emulator-based virtualization.
Article  |  Topics: Blog - EDA, Embedded, - Verification  |  Tags: , , , , , , ,   |  Organizations: ,
September 29, 2015

Tanner EDA @ Mentor Graphics: Steady as she goes

Stability is the watchword as AMS and MEMS specialist Tanner retains much of its independence - a 'start-up with a billion-dollar company behind us'.
Article  |  Topics: Digital/analog implementation, Blog - EDA  |  Tags: , , , ,   |  Organizations: ,
July 15, 2015

PSpice builds interfaces to PCB and system-level cosimulation

The need for virtual prototyping at the PCB-design has led to changes in the way PSpice is being used – with much greater emphasis on cosimulation.
Article  |  Topics: Blog - PCB  |  Tags: , , ,   |  Organizations:
May 21, 2015

Agnisys automates register checks

Agnisys is adding automated verification of SoC register maps to its IDesignSpec tool for defining and specifying registers and their behaviours, deploying both a dynamic and a formal version.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
September 29, 2014

Verification platform offers unified compile, debug environments

Synopsys is integrating its verification tools to make it easier to move between verification approaches for software centric SoCs
Article  |  Topics: Blog Topics, Verification  |  Tags: , , , , , , ,   |  Organizations:
August 6, 2014

NI moves Spice to FPGA for faster simulations

National Instruments has developed a kernel for Spice analog simulations that can be downloaded for faster performance on the FPGAs inside CompactRIO hardware.
Article  |  Topics: Blog - PCB  |  Tags: , , ,   |  Organizations:
June 2, 2014

Real Intent’s Pranav Ashar on converging design and verification

Verify early and simulate as little as possible - the idea is familiar but how do you get there?
May 21, 2014

Verification perspectives 2: formal for the masses and graph-based techniques

The second part of our interview with Mark Olen and Jim Kenney, looks at how formal and graph-based techniques move the market beyond simulation.
April 16, 2014

Verification perspectives: the growth of emulation

The first in a series of articles on how various vendors are addressing the flow's most challenging task looks at Mentor's strategy for emulation.
April 10, 2014

Mentor builds simulation-emulation bridge to ‘Verification 3.0’

Enterprise Verification Platform adds cross-over SystemVerilog, UVM, and UPF support for Veloce alongside new hardware and software debuggers.

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