Verification platform offers unified compile, debug environments
Synopsys is integrating its verification tools to make it easier to move between verification approaches for software centric SoCs
Author Archives: Luke Collins
DVCon Europe focuses on systems design and verification
Focus on systemic issues matches DVCon Europe event to European interests
Mentor joins European power electronics consortium
Will help industry giants develop more reliable power electronics systems for applications including transport and power generation.
GlobalFoundries licenses atomistic TCAD simulator toolchain
Foundry licenses atomistic TCAD simulator to better understand key aspects of advanced process nodes.
Path to 5nm plotted at DAC panel
Panel discusses Moore's law scaling beyond the 14nm node to 5nm, where economic, device, interconnect, materials, lithography and design issues abound
Internet of Things: an opportunity, but for whom?
Building the internet of Things will demand collaboration and a healthy ecosystem
eSilicon to cut costs of ASIC development for IoT, other markets
Online portals enable ASIC designers to explore IP and delivery options, enabling lower-cost markets such as IoT
Cliff Hou, TSMC VP R&D, on the route to 10nm – and beyond
Head of TSMC R&D talks about what it will take to develop and use 10nm, 7nm processes, and a possible shift to using packaging to extend Moore's law scaling
EDA industry must look to new markets for growth – Rhines
New markets such as hardware cyber security, automotive and embedded software key to EDA industry growth
Synopsys adds formal, CDC, low-power checks to Verification Compiler
Synopsys adds formal, static, clock-domain crossing, and low-power checking to verification engineers' toolbar