Author Archives: Luke Collins

About Luke Collins

Luke Collins has spent 22 years covering electronics, EDA and innovation. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the international IP9x conference series on semiconductor IP. Luke's work has also appeared in The Economist, The Financial Times and Reseach-Technology Management.
June 2, 2014

Samsung certifies Synopsys tools, IP at 14nm

Samsung, Synopsys and ARM have been working together to create a finFET design ecosystem.
Article  |  Topics: Conferences, Design to Silicon, Blog - IP  |  Tags: ,   |  Organizations: , ,
May 24, 2014

Real Intent updates lint tool, adds Matlab and Simulink support

More lint rules, better SystemVerilog support, links to MATLAB and Simulink
Article  |  Topics: Product, Verification  |  Tags: , , , , ,   |  Organizations:
April 16, 2014

FinFET variability issues challenge advantages of new process

Managing finFET variability issues without extending design times is key to extracting the most from the new processes, key players told a panel at the recent SNUG meeting in Santa Clara.
Article  |  Topics: Conferences, Blog - EDA  |  Tags: , , , , ,   |  Organizations: , , , ,
April 2, 2014

MIPS-based board for Google wearables launched by Chinese chip company

Newton, a MIPS based board from Ingenic, is optimized for Android Gear smartwatches, wearables and IoT designs.
Article  |  Topics: Blog - Embedded  |  Tags: , ,   |  Organizations: ,
March 28, 2014

Software quality acquisition to bring Synopsys “new friends”

Software quality testing company acquisition will broaden Synopsys's reach as well as serving current customers
Article  |  Topics: Verification  |  Tags: ,   |  Organizations:
March 26, 2014

Better Software, Faster!: free virtual prototyping book available now

Free book explains virtual prototyping and includes case studies about virtual prototyping from Altera, Bosch, GM, Hitachi, Lauterbach, Linaro, Microsoft, Renesas, Ricoh, Siemens, and TI.
Article  |  Topics: Verification  |  Tags: , ,   |  Organizations: , , , , , , , ,
March 26, 2014

Synopsys strengthens analog and mixed-signal verification with VCS AMS

VCS AMS updates AMS verification tool and methodology
Article  |  Topics: Verification  |  Tags: , ,   |  Organizations:
March 24, 2014

Synopsys begins IC Compiler II roll-out

New data model and optimisation strategy, plus revised analysis engines update Synopsys's IC Compiler place and route tool
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations:
February 7, 2014

Synopsys claims latest Design Compiler shrinks existing netlist area, leakage up to 10%

Uses improved logic optimisations and a new approach to meeting timing.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:
December 16, 2013

Synopsys puts physical IP prototypes into developers’ hands

Synopsys launches HAPS-DX, an FPGA-based IP and subsystem prototyping system, with an optimized toolchain and interoperability with HAPS-70 systems.
Article  |  Topics: Product  |  Tags: , , ,   |  Organizations: