Author Archives: Luke Collins

About Luke Collins

Luke Collins has spent 22 years covering electronics, EDA and innovation. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the international IP9x conference series on semiconductor IP. Luke's work has also appeared in The Economist, The Financial Times and Reseach-Technology Management.
September 14, 2016

Event: How ISO 26262 is driving automotive DFT requirements

Webinar explores the impact of ISO 26262 on DFT requirements, and what is being learnt from the introduction of the standard at ON Semiconductor.
September 12, 2016

Synopsys adds ultra-low power security processor IP

Ultra-low power security processor IP includes defences against side-channel attacks, data and instruction encryption, DSP options for sensor processing and more.
Article  |  Topics: Blog - IP, - Product  |  Tags: , , ,   |  Organizations:
August 30, 2016

Design trade-offs in using DDR4 memory for enterprise applications

A look at some of trade-offs involved in building large system memories for enterprise equipment using DDR4 IP.
Article  |  Topics: Blog - IP  |  Tags: , , ,   |  Organizations:
August 27, 2016

Creating a reference design flow for 10nm processes: video

Synopsys video details challenges of 10nm design and its collaboration with Samsung Semiconductor to build a full flow to address them.
Article  |  Topics: Conferences, Design to Silicon, Blog - EDA  |  Tags: , ,   |  Organizations: ,
July 12, 2016

Synopsys speeds ATPG, adds ISO 26262 certification

Synopsys has introduced TetraMAX II, a faster and more parallelisable ATPG and diagnostics solution, which is now also certified for use in ISO 26262 compliant automotive designs.
June 10, 2016

RC extraction from ‘virtual fab’ models may speed PDK availability

Electrical analysis facility does RC extraction on virtual fab models, accelerating the availability of early PDKs for new processes
Article  |  Topics: Conferences, Blog - EDA  |  Tags: , ,   |  Organizations:
May 5, 2016

Functional safety and high reliability for FPGA designs – eight videos show you how

Videos detail techniques to improve the functional safety and reliability of FPGA designs, including the implementation of triple modular redundancy, safe FSM schemes and self monitoring.
Article  |  Topics: Blog - EDA, Embedded, - General  |  Tags: , , , , , ,   |  Organizations:
March 30, 2016

Synopsys updates custom design tools for the finFET age

Synopsys is updating its custom design tools to make working with finFET based processes easier.
Article  |  Topics: Product  |  Tags: , ,   |  Organizations:
February 26, 2016

Six quick videos introduce key formal verification concepts

Videos discuss formal verification planning, correct initialisation, writing constraints, developing properties, interpreting results - and knowing when you have done enough.
February 23, 2016

Directed self assembly may offer similar benefits to EUV, process modeling study says

Directed self assembly techniques may offer similar benefits to EUV lithography, especially for DRAM makers, says SPIE conference paper
Article  |  Topics: Conferences  |  Tags: , , , ,   |  Organizations: