ARM has pulled together a number of forthcoming changes to its Cortex processor and Big-Little cluster architectures under the umbrella title DynamIQ, claiming they will support the increasing use of AI algorithms in servers and embedded control.
Work by the Multicore Association to provide a standard way for applications running on different processors to communicate with each other is leading to active implementations.
Electronic System Design Alliance executive director Bob Smith is to be be the keynote speaker during the DVCon Europe gala dinner.
Achronix has decided to offer the FPGA technology it has developed as a set of embeddable cores.
According to ARM's Greg Yeric in his keynote at IEDM, even with cost improvements for multiple patterning, fewer designs will see the benefit of further silicon node scaling. Savings will come from design.
Verification of SoCs can't be done by adapting IP-level strategies - it'll take a much greater interaction with software, and the use of a shared language
Sonics is moving into power management with an approach intended to substantially automate much of the job of building finely grained power-gated SoCs.
Intel 14nm finFET SoC process is among the highlights of the 2015 VLSI Symposia alongside research that looks at the integration of III-V and 2D materials for future processes.
Chris Rowen, CTO of the IP group at Cadence Design Systems, expects the internet of things (IoT) to cause a split in approaches to SoC design, one of a set of predictions about the nascent market.
In a keynote at the Intel Developer Forum, CEO Brian Krzanich said the company would start making 14nm processors by the year end and confirmed intel would license SoC designs to be fabbed by other companies.
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