Mentor to use UltraSoC acquisition to drive in-life learning

By Chris Edwards |  No Comments  |  Posted: June 23, 2020
Topics/Categories: Blog - IP  |  Tags: , , , , ,  | Organizations: ,

Siemens has agreed to acquire UK-based debug and on-chip instrumentation startup UltraSoC, aiming to fold the operation into Mentor’s Tessent test-software product portfolio.

“Siemens’ acquisition of UltraSoC means that for the first time our customers can access not just design-for-test, but a comprehensive ‘design for life-cycle management’ solution for system-on-chips, including functional safety, security and optimization,” said Brady Benware, Tessent vice president and general manager at Siemens Digital Industries Software.

Although it had its beginnings in debug for heterogeneous multicore SoCs, UltraSoC has taken advantage of the need for a cross-chip communications network separate to the main data bus or network-on-chip to convey information on application behavior to extend into a range of instrumentation applications. With a number of users specializing in data-center processor and accelerator, one of the first spinoff applications was performance monitoring. Information on which tasks are running when can provide insight to problems such as tail latency and intermittent slowdowns caused by conflicts and synchronization issues that are hard to track down without detailed background data.

Background monitoring can help pinpoint other forms of anomalous behavior, which led to the development of parallel activities in safety-critical applications such as automotive driver assistance system (ADAS) and security enforcement. A recent agreement with Agile Analog was aimed at incorporating onchip sensors that could detect physical tampering, such as clock and voltage manipulation.

Beyond debug and performance

“We’ve got good traction in a number of different markets,” said UltraSoC CEO Rupert Baines. “We have been doing very well in data center and AI. But like many others in the electronics industry, we see automotive as a market that’s growing very fast. There are huge opportunities there.”

UltraSoC was recently selected as a participant in the DARPA Automatic Implementation of Secure Silicon (AISS) program; and is a member of the Secure-CAV consortium, a collaborative project that aims to improve the safety and security of tomorrow’s connected and autonomous vehicles (CAVs).

Although automotive represents an important target for UltraSoC’s on-chip instrumentation because of the mixture of safety and security concerns, Brady Benware, vice president and general manager of Mentor’s Tessent group, said: “Almost every application is going to have concerns around security.

“We see an increasing need for monitoring of the things that go on in the life of a system,” Benware added. “Safety, security, and reliability are shared concerns throughout the supply chain.”

As outlined by Mike Mayberry in his recent keynote at the International Reliability Physics Symposium, a growing issue for manufacturers of complex SoCs is the difficulty of performing enough tests before the parts leave the factory to identify devices that might fail early coupled with the realization that aging effects mean that even healthy parts could fail early if certain areas are stressed too hard. In-life monitoring can inform designers of problems that could be used to fix yield issues and to allow for preventive maintenance in which on-chip spares are deployed before a vulnerable core fails. The yield feedback loop was the focus of a deal with PDF Solutions earlier this year.

The interaction between in-life reliability monitoring and test and yield analysis made the UltraSoC portfolio a good fit for Mentor’s Tessent group. Benware said: “We want to continue UltraSoC’s standalone capability around analytics. There is a growth path and an industry demand for all those on their own. But within the Tessent product line, there is that growing demand for in-life monitoring and data collection. It is a roadmap that we will continue to invest in independently as we bring the complementary technologies of structural and functional analysis together. There is a huge opportunity to create additional value.”

Digital twin trends

Potentially, because of the way that in-life data can be brought back into design and manufacturing, the integration extends into Siemens’ digital-twin initiatives for life-cycle management. “The digital-twin technology is something that’s very applicable. While we are just getting started with this acquisition, we are looking at the broader portfolio to leverage those integration opportunities,” Benware said.

Another area where Benware sees a benefit is in heterogeneous integration, with multiple chiplets in a package. As with SoC yield, the data provided by the individual parts may help “drive the cycles of learning” needed by manufacturers as they explore the different ways to integrate parts, Benware said. “There is more learning that the industry has to do to ensure reliability and consistency between the chiplets that are being brought together.”

Siemens’ acquisition of UltraSoC is due to close in the fourth quarter of Siemens’ fiscal year 2020. Terms of the transaction were not disclosed.

Story updated July 6, 2020

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