November 15, 2023
Siemens has completed the acquisition of Insight EDA, a specialist in circuit-reliability analysis.
July 15, 2021
The added complexity of managing reliability as chiplet-based designs become more common will need to be managed using digital-twin techniques, says a professor working in the field.
June 23, 2020
Siemens has agreed to acquire UK-based debug and on-chip instrumentation startup UltraSoC and will fold the operation into Mentor’s Tessent test-software product line.
June 10, 2020
Moortec has reworked its thermal-sensing core design to allow for finer-grained use on SoCs being designed for the 5nm node.
May 14, 2020
Papers presented at the recent IRPS conference showed the growing importance of lifetime monitoring to the problem of handling components as they age.
April 30, 2020
Keynotes at this year’s IRPS conference focused on the way in which scaling is forcing changes to the way that the reliability aspects of semiconductors are examined.
March 27, 2020
Traditional approaches to via insertion to meet reliability and yield at advanced nodes are giving way to necessary automation.
May 8, 2018
Cadence has started the rollout of a set of design tools for mixed-signal reliability analysis.
January 2, 2018
As geometries have shrunk, layout-dependent effects in CMOS have become ever more problematic. They are not just popping up in performance but reliability and aging effects as one IEDM presentation showed.
August 30, 2016
A look at some of trade-offs involved in building large system memories for enterprise equipment using DDR4 IP.