Standards

July 5, 2019
ES Design West logo

The road to ES Design West: Design Pavilion

ES Design West aims to help integrate the supply chain but also has plenty of engineering content aimed at low power, security, embedded and more.
July 3, 2019
IBM Q

Roadmapping the quantum realm

The US Quantum Economic Development Consortium is looking to stimulate a supply chain and technology infrastructure for quantum computing, with more about its efforts due to come out in the next few days.
July 2, 2019

The road to ES Design West: Location, location, location

There's still plenty of time to build a busy and profitable agenda for a visit to ES Design West and SEMICON West in San Francisco next week.
July 2, 2019

SmartDV adds verification IP for OpenCAPI data-center standard

The verification IP is the first to become commercially available for the bus interface backed by companies such as AMD, Google, IBM, Micron and Xilinx.
June 13, 2019

The road to ES Design West: AI

AI, its system design implications and its impact on EDA tools themselves will be a key theme for ES Design West next month.
June 4, 2019

The unknown unknowns of secure devices

Developing a security assurance standard for IP faces numerous problems but Accellera working-group members are trying to find an answer.
May 28, 2019

ESDesign West gets HoT

Heart of Technology (HoT) founder and Jim Hogan talks about the event at the upcoming ESDesign West show in San Francisco.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
May 13, 2019

Security, machine learning, and variety at DAC

Security and machine learning are two topics that take center stage at DAC this year, says the conference’s general chair Rob Aitken.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , ,   |  Organizations: , ,
May 3, 2019

ES Design West outreach attracts launch participants

EDA and IP supporters of the new event see the goal of greater integration with the electronic systems supply chain as fundamental to their involvement.
April 24, 2019

May meeting to push for UVM analog extensions

Accellera is trying to standardize extensions to UVM for mixed-signal design.
Article  |  Topics: Blog - EDA, IP  |  Tags: , ,   |  Organizations: