August 5, 2021
DVCon Europe has announced its first two keynote speakers, who will cover the topics of AI and the role of virtualisation in ADAS design and implementation
August 2, 2021
DAC and the RISC-V Summit will colocate at Moscone West in December, along with Semicon West.
July 16, 2021
Vulnerabilities in connected healthcare products have led medical requlators to issue further security recommendations for their design and maintenance.
July 14, 2021
Accellera has approved version 1.0 of the SA-EDI standard, intended to provide a consistent way of describing security concerns for IP cores.
June 17, 2021
A de facto standard for exchanging thermal information about designs has become JEDEC standard JEP181.
April 15, 2021
The Accellera board has approved version 2.0 of the Portable Test and Stimulus Standard.
April 7, 2021
Accellera has published the version 1.0 draft of the proposed Security Annotation for Electronic Design Integration standard.
February 10, 2021
SEMI event brings together players from the global microelectronics supply chain, manufacturing, and end-user communities.
November 27, 2020
Use of the open-source RISC-V processor was tracked for the first time by the biennial study, finding notably high take-up.
November 19, 2020
Accellera Systems Initiative has published for open review version 2.0 of the Portable Test and Stimulus standard.