Standards

DVCon Europe has announced its two keynote presentations, focusing on energy-efficient high-performance computing and machine learning.

Accellera has formed a working group to look at the possibility of creating a standard for federated simulation.

The 69th annual IEEE IEDM has issued a call for papers seeking the world’s best original work in all areas of microelectronics research and development.

Processor IP company will incorporate custom instructions and other changes in its superscalar core, which includes a novel memory unit for sparse matrices.

DVCon Europe is expanding coverage into research on design verification for its 10th conference later this year.

SEMI predicts 300mm capacity to grow to almost 10,000 wafers per month in 2026, up from 6,500 in 2021.

Accellera has formed a clock-domain crossing working group and has also passed its security-annotation standard to the IEEE.

The winner of the best-paper award at DVCon Europe went to a team from Samsung based in India, describing their work on a reusable agent for testing the behavior of error-correcting memory circuits.

Aside from the keynotes and technical papers, the networking at an event like DVCon Europe provides a way to keep open-source EDA on the road.

DVCon Europe's keynotes will examine verification issues in connected cars and 5G networks.