USB


February 13, 2018

HyperLynx update automates SerDes validation

Simulation suite automates the largely manual process of validating more than 25 SerDes protocols.
Article  |  Topics: Blog Topics, Blog - PCB, - Product  |  Tags: , , , , , ,   |  Organizations:
October 10, 2016

Cadence packages VIP for ten protocols

Cadence Design Systems has released a set of ten verification IP packages intended to support a new crop of standard protocols.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations:
July 28, 2015

USB Type-C IP to ease end users’ frustration

Synopsys delivers reconfigured PHY IP to support reversible USB Type-C connector.
Article  |  Topics: Blog - IP, - Product  |  Tags: , , , , ,
June 2, 2015

COMPUTEX 2015: Intel sets out battle plan for Thunderbolt I/O

Thunderbolt speed to double to 40GBit/s, cheaper ownership for consumers, proprietary plug dumped in favor of USB-C as Intel looks to reinvigorate tech.
Article  |  Topics: Commentary, Conferences, Blog - IP, PCB, - Product, Standards  |  Tags: , , , ,   |  Organizations:
April 22, 2015

UltraSoC pushes debug over USB

UltraSoC has added the ability to employ a USB 2.0 port instead of JTAG as the main debug access point on SoCs that use the company’s UltraDebug technology.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , ,   |  Organizations:
May 17, 2014

Cadence ports IP and qualifies tools for 28nm FD-SOI

Cadence Design Systems has developed two sets of IP aimed at the 28nm FD-SOI process developed by STMicroelectronics and qualified tools for the process.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations: , ,
May 20, 2013

TVS expands VIP library

Test and Verification Solutions has expanded its library of verification IP to cover protocols in MIPI, memories, serial IO and communication.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , , ,   |  Organizations:
May 7, 2013

CDNLive EMEA: Cadence to buy Evatronix

Cadence Design Systems has decided to buy Poland-based IP developer Evatronix as part of a plan to round out its portfolio of interfaces for SoC designs.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:
February 8, 2013

Cadence buys IP provider Cosmic

Cadence Design Systems is to buy Cosmic Circuits Private Limited, a developer of analog and mixed signal intellectual property (IP) cores.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations:
February 27, 2012

Synopsys verification IP launch has bite

Synopsys has rolled out its SystemVerilog-based verification IP portfolio for a bunch of interconnect standards – and built in support for all the three major verification methodologies.

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors